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74VCX16373DT

产品描述Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch
产品类别逻辑    逻辑   
文件大小231KB,共10页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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74VCX16373DT概述

Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch

74VCX16373DT规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称ON Semiconductor(安森美)
零件包装代码TSSOP
包装说明TSSOP, TSSOP48,.3,20
针数48
Reach Compliance Codenot_compliant
Base Number Matches1

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74VCX16373
Low−Voltage 1.8/2.5/3.3V
16−Bit Transparent Latch
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74VCX16373 is an advanced performance, non−inverting
16−bit transparent latch. It is designed for very high−speed, very
low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The
VCX16373 is byte controlled, with each byte functioning identically,
but independently. Each byte has separate Output Enable and Latch
Enable inputs. These control pins can be tied together for full 16−bit
operation.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.
The 74VCX16373 contains 16 D−type latches with 3−state
3.6 V−tolerant outputs. When the Latch Enable (LEn) inputs are
HIGH, data on the Dn inputs enters the latches. In this condition, the
latches are transparent, (a latch output will change state each time its
D input changes). When LE is LOW, the latch stores the information
that was present on the D inputs a setup time preceding the
HIGH−to−LOW transition of LE. The 3−state outputs are controlled
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are
enabled. When OE is HIGH, the standard outputs are in the high
impedance state, but this does not interfere with new data entering into
the latches.
Features
http://onsemi.com
MARKING DIAGRAM
48
48
1
VCX16373
AWLYYWW
TSSOP−48
DT SUFFIX
CASE 1201
A
WL
YY
WW
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN NAMES
Pins
OEn
LEn
D0−D15
O0−O15
Function
Output Enable Inputs
Latch Enable Inputs
Inputs
Outputs
Designed for Low Voltage Operation: V
CC
= 1.65 V
3.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation:3.0 ns max for 3.0 V to 3.6 V
3.9 ns max for 2.3 V to 2.7 V
6.8 ns max for 1.65 V to 1.95 V
Static Drive:
±24
mA Drive at 3.0 V
±18
mA Drive at 2.3 V
±6
mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
Near Zero Static Supply Current in All Three Logic States (20
mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±250
mA @ 125°C
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
All Devices in Package TSSOP are Inherently Pb−Free*
ORDERING INFORMATION
Device
74VCX16373DT
74VCX16373DTR
Package
TSSOP
(Pb−Free)
TSSOP
(Pb−Free)
Shipping
39 / Rail
2500 / Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
June, 2006
Rev. 6
1
Publication Order Number:
74VCX16373/D

74VCX16373DT相似产品对比

74VCX16373DT 74VCX16373_06 74VCX16373DTR 74VCX16373
描述 Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch

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