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74VCXH16374DTR

产品描述Low−Voltage 1.8/2.5/3.3V 16-Bit D−Type Flip−Flop With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
产品类别逻辑    逻辑   
文件大小243KB,共11页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
下载文档 详细参数 选型对比 全文预览

74VCXH16374DTR概述

Low−Voltage 1.8/2.5/3.3V 16-Bit D−Type Flip−Flop With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)

74VCXH16374DTR规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称ON Semiconductor(安森美)
零件包装代码TSSOP
包装说明TSSOP, TSSOP48,.3,20
针数48
Reach Compliance Codenot_compliant
系列ALVC/VCX/A
JESD-30 代码R-PDSO-G48
JESD-609代码e0
长度12.5 mm
负载电容(CL)30 pF
逻辑集成电路类型BUS DRIVER
最大频率@ Nom-Sup250000000 Hz
最大I(ol)0.018 A
湿度敏感等级1
位数8
功能数量2
端口数量2
端子数量48
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP48,.3,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法TAPE AND REEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
Prop。Delay @ Nom-Sup3 ns
传播延迟(tpd)7.8 ns
认证状态Not Qualified
座面最大高度1.1 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1.65 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
触发器类型POSITIVE EDGE
宽度6.1 mm
Base Number Matches1

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74VCXH16374
Low−Voltage 1.8/2.5/3.3V
16−Bit D−Type Flip−Flop
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74VCXH16374 is an advanced performance, non−inverting
16−bit D−type flip−flop. It is designed for very high−speed, very
low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The VCXH16374
is byte controlled, with each byte functioning identically, but
independently. Each byte has separate Output Enable and Clock Pulse
inputs. These control pins can be tied together for full 16−bit operation.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6V.
The 74VCXH16374 consists of 16 edge−triggered flip−flops with
individual D−type inputs and 3.6 V−tolerant 3−state outputs. The
clocks (CPn) and Output Enables (OEn) are common to all flip−flops
within the respective byte. The flip−flops will store the state of
individual D inputs that meet the setup and hold time requirements on
the LOW−to−HIGH Clock (CP) transition. With the OE LOW, the
contents of the flip−flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. The OE input level
does not affect the operation of the flip−flops. The data inputs include
active bushold circuitry, eliminating the need for external pullup
resistors to hold unused or floating inputs at a valid logic state.
Features
http://onsemi.com
MARKING DIAGRAM
48
48
1
VCXH16374
AWLYYWW
TSSOP−48
DT SUFFIX
CASE 1201
A
WL
YY
WW
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN NAMES
Pins
OEn
CPn
D0−D15
O0−O15
Function
Output Enable Inputs
Clock Pulse Inputs
Inputs
Outputs
Designed for Low Voltage Operation: V
CC
= 1.65 V
3.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation: 3.0 ns max for 3.0 V to 3.6V
3.9 ns max for 2.3 V to 2.7V
7.8 ns max for 1.65 V to 1.95V
Static Drive:
±24
mA Drive at 3.0 V
±18
mA Drive at 2.3 V
±6
mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid
Logic State
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V*
Near Zero Static Supply Current in All Three Logic States (20
mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±250
mA @ 125°C
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
All Devices in Package TSSOP are Inherently Pb−Free**
ORDERING INFORMATION
Device
74VCXH16374DT
74VCXH16374DTR
Package
TSSOP
(Pb−Free)
TSSOP
(Pb−Free)
Shipping
39 / Rail
2500 / Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*To ensure the outputs activate in the 3−state condition, the output enable pins
should be connected to V
CC
through a pullup resistor. The value of the resistor
is determined by the current sinking capability of the output connected to the
OE pin.
**For additional information on our Pb−Free strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
June, 2006
Rev. 5
1
Publication Order Number:
74VCXH16374/D

74VCXH16374DTR相似产品对比

74VCXH16374DTR 74VCXH16374DT 74VCXH16374
描述 Low−Voltage 1.8/2.5/3.3V 16-Bit D−Type Flip−Flop With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting) Low−Voltage 1.8/2.5/3.3V 16-Bit D−Type Flip−Flop With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting) Low−Voltage 1.8/2.5/3.3V 16-Bit D−Type Flip−Flop With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
是否Rohs认证 不符合 不符合 -
厂商名称 ON Semiconductor(安森美) ON Semiconductor(安森美) -
零件包装代码 TSSOP TSSOP -
包装说明 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20 -
针数 48 48 -
Reach Compliance Code not_compliant not_compliant -
Base Number Matches 1 1 -

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