MDT1005
1. General Description
This ROM-Based 8-bit micro-controller uses
a fully static CMOS design technology
combines higher speed and smaller size with
the low power and high noise immunity of
CMOS.
On chip memory system includes 0.5 K bytes
of ROM, and 32 bytes of static RAM.
u
Sleep Mode for power saving
u
8-bit real time clock/counter(RTCC) with
8-bit programmable prescaler
u
4 types of oscillator can be selected by
programming option:
RC－Low cost RC oscillator
LFXT－Low frequency crystal oscillator
XTAL－Standard crystal oscillator
HFXT－High frequency crystal oscillator
u
4 oscillator start-up time can be
selected by programming option:
150
µs,
20 ms, 40 ms, 80 ms
2. Features
The followings are some of the features on the
hardware and software :
u
Fully CMOS static design
u
8-bit data bus
u
On chip ROM size : 512 words
u
Internal RAM size : 32 bytes
(25 general purpose registers, 7 special
registers)
u
36 single word instructions
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14-bit instructions
u
2-level stacks
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Operating voltage : 2.3V ~ 6.3 V
u
Operating frequency : 0 ~ 20 MHz
u
The most fast execution time is 200 ns
under 20 MHz in all single cycle
instructions except the branch instruction
u
Addressing modes include direct, indirect
and relative addressing modes
u
Power-on Reset
u
Power edge-detector Reset
u
On-chip RC oscillator based Watchdog
Timer(WDT) can be operated freely
u
Pull up resistors for the following pins :
PA0~PA3, PB0~PB7, /MCLR, RTCC
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Pull down resistors for the following pins :
PA0~PA3, PB0~PB7, RTCC
u
12 I/O pins with their own independent
direction control
3. Applications
The application areas of this MDT1005
range from appliance motor control and high
speed automotive to low power remote
transmitters/receivers, pointing devices, and
telecommunications processors, such as
Remote controller, small instruments,
chargers, toy, automobile and PC
peripheral … etc.
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.1
2005/6
Ver1.4
MDT1005
6. Memory Map
(A) Register Map
Address
00
01
02
03
04
05
06
07~1F
Description
Indirect Addressing Register
RTCC
PC
STATUS
MSR
Port A
Port B
Internal RAM, General Purpose Register
(1) IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A8
A7~A0
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.3
2005/6
Ver1.4
MDT1005
(4) STATUS (Status register) : R3
Bit
0
1
2
3
4
5—7
Symbol
C
HC
Z
PF
TF
——
Carry bit
Half Carry bit
Zero bit
Power loss Flag bit
Time overflow Flag bit
General purpose bits
Function
(5) MSR (Memory Select Register) : R4
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) TMR (Time Mode Register)
Bit
Symbol
Prescaler Value
Function
RTCC rate
WDT rate
0 0 0
1:2
1:1
0 0 1
1:4
1:2
0 1 0
1:8
1:4
0 1 1
1 : 16
1:8
1 0 0
1 : 32
1 : 16
1 0 1
1 : 64
1 : 32
1 1 0
1 : 128
1 : 64
1 1 1
1 : 256
1 : 128
Prescaler assignment bit :
0
—
RTCC
1
—
Watchdog Timer
RTCC signal Edge :
0
—
Increment on low-to-high transition on RTCC pin
1
—
Increment on high-to-low transition on RTCC pin
RTCC signal set :
0
—
Internal instruction cycle clock
1
—
Transition on RTCC pin
2—0
PS2—0
3
PSC
4
TCE
5
TCS
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.4
2005/6
Ver1.4
FPGA/CPLD
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