DATASHEET
ISL6334, ISL6334A
VR11.1, 4-Phase PWM Controller with Light-Load Efficiency Enhancement and
Load Current Monitoring Features
The
ISL6334, ISL6334A
control microprocessor core voltage
regulation by driving up to 4 interleaved synchronous-rectified
buck channels in parallel. This multiphase architecture results in
multiplying channel ripple frequency and reducing input and
output ripple currents. Lower ripple results in fewer components,
lower cost, reduced power dissipation and smaller
implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and requires high efficiency at light
load. The ISL6334, ISL6334A utilizes Intersil’s proprietary
Active Pulse Positioning (APP), Adaptive Phase Alignment
(APA) modulation scheme, active phase adding and dropping
to achieve and maintain the extremely fast transient response
with fewer output capacitors and high efficiency from light to
full load.
The ISL6334, ISL6334A is designed to be completely
compliant with Intel VR11.1 specifications. It accurately
reports the load current via IMON pin to the microprocessor,
which sends an active low PSI# signal to the controller at low
power mode. The controller then enters 1- or 2-phase
operation with diode emulation option to reduce magnetic
core and switching losses, yielding high efficiency at light load.
After the PSI# signal is deasserted, the dropped phase(s) are
added back to sustain heavy load transient response and
efficiency.
Today’s microprocessors require a tightly regulated output voltage
position versus load current (droop). The ISL6334, ISL6334A
senses the output current continuously by utilizing patented
techniques to measure the voltage across the dedicated current
sense resistor or the DCR of the output inductor. The sensed
current flows out of FB pin to develop the precision voltage drop
across the feedback resistor for droop control. Current sensing
circuits also provide the needed signals for channel-current
balancing, average overcurrent protection and individual phase
current limiting. An NTC thermistor’s temperature is sensed via
TM pin and internally digitized for thermal monitoring and for
integrated thermal compensation of the current sense elements.
A unity gain, differential amplifier is provided for remote voltage
sensing and completely eliminates any potential difference
between remote and local grounds. This improves regulation and
protection accuracy. The threshold-sensitive enable input is
available to accurately coordinate the start-up of the ISL6334,
ISL6334A with any other voltage rail. Dynamic-VID™ technology
allows seamless on-the-fly VID changes. The offset pin allows
accurate voltage offset settings that are independent of VID
setting.
FN6482
Rev 3.00
May 6, 2016
Features
• Intel VR11.1 compliant
• Proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme
• Proprietary active phase adding and dropping with diode
emulation scheme for high light-load efficiency
• Precision multiphase core voltage regulation
- Differential remote voltage sensing
- ±0.5% Closed-loop system accuracy over load, line and
temperature
- Bi-directional, adjustable reference-voltage offset
• Precision resistor or DCR differential current sensing
- Accurate load line (droop) programming
- Accurate channel-current balancing
- Accurate load current monitoring via IMON pin
• Microprocessor voltage identification input
- Dynamic VID™ technology for VR11.1 requirement
- 8-Bit VID, VR11 compatible
• Average overcurrent protection and channel current limit
• Precision overcurrent protection on IMON pin
• Thermal monitoring and overvoltage protection
• Integrated programmable temperature compensation
• Integrated open sense line protection
• 1- to 4-phase operation, coupled inductor compatibility
• Adjustable switching frequency up to 1MHz per phase
• Package option
- QFN compliant to JEDEC PUB95 MO-220 QFN (Quad Flat
No Leads) package outline
• Pb-free (RoHS Compliant)
FN6482 Rev 3.00
May 6, 2016
Page 1 of 31
ISL6334, ISL6334A
Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Controller and Driver Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ISL6334 and ISL6334A Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical Application: 4-Phase VR with Integrated Thermal Compensation, PSI# (DE and GVOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical Application - 4-Phase VR with 1-Phase PSI# and without Diode Emulation and GVOT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Application -VR with External Thermal Compensation, 2-Phase PSI# (no DE and GVOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiphase Power Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interleaving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Modulation Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM and PSI# Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel-Current Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Line Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output-Voltage Offset Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
13
14
14
15
15
16
16
19
20
20
Operation Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Enable and Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Soft-Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Current Sense Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Fault Monitoring and Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VR_RDY Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Integrated Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Design Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Design Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Sensing Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Line Regulation Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Filter Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
22
22
22
22
24
24
24
25
25
25
26
26
27
27
28
28
Thermal Monitoring (VR_HOT/VR_FAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Voltage-Regulator (VR) Design Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FN6482 Rev 3.00
May 6, 2016
Page 2 of 31
ISL6334, ISL6334A
Ordering Information
PART NUMBER
(Notes
3, 4)
ISL6334IRZ (Note
1)
ISL6334AIRZ (Note
1)
ISL6334CRZ (Note
1)
ISL6334ACRZ (Note
2)
PART
MARKING
ISL6334 IRZ
6334A IRZ
ISL6334 CRZ
6334A CRZ
TEMP. RANGE (°C)
-40 to +85
-40 to +85
0 to +70
0 to +70
PACKAGE
(RoHS Compliant
40 Ld 6x6 QFN
40 Ld 6x6 QFN
40 Ld 6x6 QFN
40 Ld 6x6 QFN
PKG.
DWG. #
L40.6x6
L40.6x6
L40.6x6
L40.6x6
1. Add “-T” suffix for 4k unit tape and reel option. Please refer to
TB347
for details on reel specifications.
2. Add “-T” suffix for 4k unit or “-TK” suffix for 1k unit tape and reel option. Please refer to
TB347
for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information page for
ISL6334, ISL6334A.
For more information on MSL please see techbrief
TB363.
TABLE 1. ISL6336x/4x FAMILY SUMMARY
INTERSIL PN
ISL6336
ISL6336A
ISL6336D
ISL6334
ISL6334A
ISL6334D
NUMBER OF PHASES
6
6
6
4
4
4
DIODE
EMULATION
Yes
No
No
Yes
No
No
DROOP
Yes
Yes
No
Yes
Yes
No
H_CPURST_N INPUT
No
No
No
No
No
No
TARGETED APPLICATIONS
VR11.x CPU
VR11.x CPU
General Purpose, Memory
VR11.x CPU
VR11.x CPU
General Purpose, Memory
FN6482 Rev 3.00
May 6, 2016
Page 3 of 31
ISL6334, ISL6334A
Pin Configuration
ISL6334, ISL6334A
(40 LD QFN)
TOP VIEW
EN_PWR
32
VR_HOT
VR_RDY
VR_FAN
EN_VTT
VID7
PWM3
31
30
29
28
27
GND
26
25
24
23
22
21
11
DAC
12
REF
13
COMP
14
FB
15
VDIFF
16
RGND
17
VSEN
18
TCOMP
19
VCC
20
PWM2
ISEN3-
ISEN3+
ISEN1+
ISEN1-
PWM1
PWM4
ISEN4-
ISEN4+
ISEN2+
ISEN2-
TM
SS
35
40
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
OFS
IMON
1
2
3
4
5
6
7
8
9
10
39
38
37
36
34
FS
33
Controller and Driver Recommendation
CONTROLLER
ISL6334
ISL6334A
COMMENTS
When PSI# is asserted low, the remained channel transmits a special PWM protocol that can be recognized only by the dedicated
VR11.1 drivers ISL6622/ISL6620 for Diode Emulation (DCM) operation. The dropped channel remains in tri-state.
When PSI# is asserted low, the remained channel transmits normal CCM PWM that can be recognized by any Intersil driver such
as ISL6612/ISL6614, ISL6596, ISL6610, and even ISL6622/ISL6620. The dropped channel remains in tri-state.
DRIVER
ISL6622
ISL6622A
ISL6620, ISL6620A
ISL6612, ISL6612A
ISL6596
ISL6614, ISL6614A
ISL6610
GATE
DRIVE
VOLTAGE
(V)
12
12
5
12
5
12
5
# OF
GATE
DRIVES
Dual
Dual
Dual
Dual
Dual
Quad
Quad
DIODE
EMULATION
(DE)
Yes
Yes
Yes
No
No
No
No
GATE DRIVE
DROP
(GVOT)
Yes
No
No
No
No
No
No
COMMENTS
For PSI# channel and its coupled channel in coupled inductor
applications or all channels
For PSI# channel and its coupled channel in coupled inductor
applications or all channels.
For PSI# channel and its coupled channel in coupled inductor
applications or all channels
For dropped phases or all channels with ISL6634A
For dropped phases or all channels with ISL6634A
For dropped phases or all channels with ISL6634A
For dropped phases or all channels with ISL6634A
NOTE: Intersil 5V and 12V drivers are mostly pin-to-pin compatible and allow dual footprint layout to optimize MOSFET selection and efficiency. Dual =
One synchronous channel; Quad = Two synchronous channels.
FN6482 Rev 3.00
May 6, 2016
Page 4 of 31
ISL6334, ISL6334A
ISL6334 and ISL6334A Block Diagram
VDIFF VR_RDY
FS
PSI#
RGND
VSEN
-
+
X1
CLOCK AND
RAMP GENERATOR
N
POWER-ON
RESET (POR)
-
+
0.870
EN_VTT
0.870
-
+
OVP
SOFT-START
AND
FAULT LOGIC
+
EN_PWR
-
+175mV
APP and APA
MODULATOR
PWM1
SS
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DAC
DYNAMIC
VID
D/A
APP and APA
MODULATOR
PWM2
APP and APA
MODULATOR
PWM3
APP and APA
MODULATOR
OFFSET
PWM4
OFS
REF
FB
COMP
+
-
E/A
CHANNEL
CURRENT
BALANCE
AND PEAK
CURRENT LIMIT
CHANNEL
DETECT
N
1.11V
+
-
IMON
1.11V
OCP
OCP
+
I_TRIP
ISEN1+
ISEN1-
ISEN2+
CHANNEL
CURRENT
SENSE
-
1
N
TEMPERATURE
COMPENSATION
ISEN2-
ISEN3+
ISEN3-
ISEN4+
ISEN4-
VR_HOT
VR_FAN
THERMAL
MONITOR
TEMPERATURE
COMPENSATION
GAIN ADJUST
TM
TCOMP
GND
FIGURE 1. BLOCK DIAGRAM
FN6482 Rev 3.00
May 6, 2016
Page 5 of 31
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
