74LVC16240A-Q100
16-bit buffer/line driver with 5 V tolerant inputs/outputs;
inverting; 3-state
Rev. 1 — 19 May 2014
Product data sheet
1. General description
The 74LVC16240A-Q100 is a 16-bit inverting buffer/line driver with 3-state outputs. The
device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device
features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the
3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance
OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3 V and 5 V applications.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pinout architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V
JESD8-5A (2.3 V to 2.7 V
JESD8-C/JESD36 (2.7 V to 3.6 V
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Nexperia
74LVC16240A-Q100
16-bit buffer/line driver; 5 V tolerant; inverting; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC16240ADGG-Q100
40 C
to +125
C
TSSOP48
Description
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
Version
SOT362-1
Type number
4. Functional diagram
47
2
36
13
1A0
1Y0
3A0
3Y0
1A1
46
3
1Y1
3A1
35
14
3Y1
1A2
44
5
1Y2
3A2
33
16
3Y2
1A3
43
6
1Y3
3A3
32
17
3Y3
1OE
1
3OE
25
2A0
41
8
2Y0
4A0
30
19
4Y0
2A1
40
9
2Y1
4A1
29
20
4Y1
2A2
38
11
2Y2
4A2
27
22
4Y2
2A3
37
12
2Y3
4A3
26
23
4Y3
2OE
48
4OE
24
001aaa439
Fig 1.
Logic symbol
74LVC16240A-Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 19 May 2014
2 of 15
Nexperia
74LVC16240A-Q100
16-bit buffer/line driver; 5 V tolerant; inverting; 3-state
5. Pinning information
5.1 Pinning
Fig 3.
Pin configuration TSSOP48
5.2 Pin description
Table 2.
Name
1OE
2OE
3OE
4OE
GND
V
CC
1Y[0:3]
2Y[0:3]
3Y[0:3]
4Y[0:3]
Pin description
Pin
1
48
25
24
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
2, 3, 5, 6
8, 9, 11, 12
13, 14, 16, 17
19, 20, 22, 23
Description
output enable input (active LOW)
output enable input (active HIGH)
output enable input (active HIGH)
output enable input (active LOW)
ground (0 V)
supply voltage
data output
data output
data output
data output
74LVC16240A-Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 19 May 2014
4 of 15
Nexperia
74LVC16240A-Q100
16-bit buffer/line driver; 5 V tolerant; inverting; 3-state
Table 2.
Name
1A[0:3]
2A[0:3]
3A[0:3]
4A[0:3]
Pin description
…continued
Pin
47, 46, 44, 43
41, 40, 38, 37
36, 35, 33, 32
30, 29, 27, 26
Description
data input
data input
data input
data input
6. Functional description
Table 3.
Input
nOE
L
L
H
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Function table
[1]
Output
nAn
L
H
X
nYn
H
L
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[2]
[2]
Max
+6.5
-
+6.5
50
V
CC
+ 0.5
+6.5
50
100
-
+150
500
Unit
V
mA
V
mA
V
V
mA
mA
mA
C
mW
V
O
> V
CC
or V
O
< 0 V
output HIGH or LOW state
output 3-state
V
O
= 0 V to V
CC
0.5
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[3]
-
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
Above 60
C,
the value of P
tot
derates linearly with 5.5 mW/K.
74LVC16240A-Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 19 May 2014
5 of 15
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