TBD62304A series
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TBD62304APG, TBD62304AFNG, TBD62304AFWG
7-ch low active sink type DMOS transistor array
TBD62304A series are DMOS transistor arrays with 7 circuits. Please be
careful about thermal conditions during use.
TBD62304APG
Features
•
•
•
•
•
•
Built-in 7 circuits
High voltage
High current
Input voltage (output on)
Input voltage (output off)
Package
:
V
OUT
= 50 V (max)
:
I
OUT
= 500 mA/ch (max)
:
-20 V to V
CC
-3.5 V
:
V
CC
-0.4 V to V
CC
:
PG type
FNG type
FWG type
DIP16-P-300-2.54A
SSOP16-P-225-0.65B
P-SOP16-0410-1.27-002
DIP16-P-300-2.54A
TBD62304AFNG
SSOP16-P-225-0.65B
Pin Assignment (top view)
TBD62304AFWG
O1
O2
O3
O4
O5
O6
O7
VCC
I1
I2
I3
I4
I5
I6
I7
GND
P-SOP16-0410-1.27-002
Weight
DIP16-P-300-2.54A
:1.13 g (typ.)
SSOP16-P-225-0.65B
:0.07 g (typ.)
P-SOP16-0410-1.27-002 :0.15 g (typ.)
Pin connection may be omitted partially or simplified for explanatory purpose.
©2017 Toshiba Corporation
1
2017-03-24
TBD62304A series
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin name
I1
I2
I3
I4
I5
I6
I7
GND
VCC
O7
O6
O5
O4
O3
O2
O1
Function
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
Ground pin
Power supply pin
Output pin
Output pin
Output pin
Output pin
Output pin
Output pin
Output pin
Basic Circuit
VCC
OUTPUT
INPUT
Basic circuit may be omitted partially or simplified for explanatory purpose.
2
2017-03-24
TBD62304A series
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Power supply voltage
Output voltage
Output current (per ch)
Input voltage
Power
dissipation
PG (Note1)
FNG (Note2)
FWG (Note3)
T
opr
T
stg
P
D
Symbol
V
CC
V
OUT
I
OUT
V
IN
Rating
−0.5 to 6.0
50
500
−22 to V
CC
+0.5 (Note4)
1.47
0.78
1.25
−40 to 85
−55 to 150
°C
°C
W
Unit
V
V
mA
V
Operating temperature
Storage temperature
Note1: Standalone. When Ta exceeds 25 °C, it is necessary to do the derating with 11.8 mW/°C.
Note2: On PCB (size: 50 mm
×
50 mm
×
1.6 mm, Cu area: 40 %, single-side glass epoxy). When Ta exceeds 25 °C, it is
necessary to do the derating with 6.24 mW/°C.
Note3: On PCB (compliant with JEDEC 2s2p). When Ta exceeds 25 °C, it is necessary to do the derating with 10
mW/°C.
Note4: Do not exceed 6 V
Operating Ranges (Ta = −40 to 85°C, unless otherwise specified.)
Characteristics
Power supply voltage
Output voltage
Symbol
V
CC
V
OUT
t
pw
= 25 ms
7 circuits ON
Ta = 85 °C
T
j
= 120 °C
t
pw
= 25 ms
7 circuits ON
Ta = 85 °C
T
j
= 120 °C
t
pw
= 25 ms
7 circuits ON
Ta = 85 °C
T
j
= 120 °C
Test conditions
―
―
1 circuit ON, Ta = 25 °C
PG (Note1)
Duty = 10 %
Duty = 50 %
Min
4.5
―
0
0
0
0
0
0
0
0
0
-20
V
CC
-0.4
Typ.
5.0
―
―
―
―
―
―
―
―
―
―
―
―
Max
5.5
50
400
400
190
400
300
130
400
390
170
V
CC
-3.5
V
CC
V
V
mA
Unit
V
V
1 circuit ON, Ta = 25 °C
Output current
(per ch)
FNG (Note2)
I
OUT
Duty = 10 %
Duty = 50 %
1 circuit ON, Ta = 25 °C
FWG (Note3)
Duty = 10 %
Duty = 50 %
Input voltage (Output on)
Input voltage (Output off)
V
IN (ON)
I
OUT
= 100 mA or more, V
OUT
= 2 V
V
IN (OFF)
I
OUT
= 100
μA
or less, V
OUT
= 2 V
Note1: Stand alone
Note2: On PCB (size: 50 mm
×
50 mm
×
1.6 mm, Cu area: 40 %, single-side glass epoxy).
Note3: On PCB (compliant with JEDEC 2s2p)
3
2017-03-24
TBD62304A series
Electrical Characteristics (Ta = 25°C, unless otherwise specified.)
Characteristics
Output leakage current
Symbol
I
leak
Test
Circuit
1
Test conditions
V
OUT
= 50 V, Ta = 85 °C
V
IN
= V
CC
= 5.5 V
I
OUT
= 350 mA
V
CC
= 5.0 V, V
IN
= 0 V
Output voltage
(Output ON-resistance)
V
DS
(R
ON)
2
I
OUT
= 200 mA,
V
CC
= 5.0 V, V
IN
= 0 V
I
OUT
= 100 mA
V
CC
= 5.0 V, V
IN
= 0 V
Input current
I
IN(ON)
I
IN(OFF)
Consumption current (per ch)
Turn-on delay
Turn-off delay
I
CC(ON)
I
CC(OFF)
t
ON
t
OFF
3
4
3
4
5
V
CC
= 5.5 V, V
IN
= 0 V
V
CC
= 5.5 V, V
IN
= -20 V
V
CC
= V
IN
= 5.5 V
V
CC
= 5.5 V, V
IN
= 0 V
V
CC
= 5.5 V, V
IN
= V
CC
V
CC
= 5.0 V, V
OUT
= 50 V
R
L
= 125
Ω
C
L
= 15 pF
Min
―
―
―
―
―
―
―
―
―
―
―
Typ.
―
0.525
(1.5)
0.3
(1.5)
0.15
(1.5)
-10
-100
―
70
―
0.6
0.6
Max
1.0
1.14
(3.25)
0.65
(3.25)
0.325
(3.25)
-100
-200
1.0
200
1.0
―
―
μA
μA
μA
μA
μs
V
(Ω)
Unit
μA
4
2017-03-24
TBD62304A series
Test Circuit
1. I
leak
VCC
2. V
DS
(R
ON
)
VCC
INPUT
OUTPUT
V
CC
V
IN
GND
I
leak
V
OUT
INPUT
OUTPUT
V
CC
V
IN
GND
I
OUT
V
DS
R
ON
= V
DS
/ I
OUT
3. I
IN (ON),
I
CC (ON)
VCC
4. I
IN (OFF),
I
CC (OFF)
VCC
I
CC(ON)
V
CC
I
IN(ON)
V
IN
INPUT
OUTPUT
I
CC(OFF)
V
CC
I
IN(OFF)
V
IN
INPUT
OUTPUT
GND
GND
Test circuits may be omitted partially or simplified for explanatory purpose.
5
2017-03-24
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
