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ISL9000AIRFJZ-T

产品描述IC REG LINEAR 2.5V/2.8V 10DFN
产品类别电源/电源管理    电源电路   
文件大小718KB,共14页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
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ISL9000AIRFJZ-T概述

IC REG LINEAR 2.5V/2.8V 10DFN

ISL9000AIRFJZ-T规格参数

参数名称属性值
Brand NameIntersil
厂商名称Renesas(瑞萨电子)
零件包装代码DFN
包装说明HVSON, SOLCC10,.11,20
针数10
Reach Compliance Codecompliant
ECCN代码EAR99
Factory Lead Time7 weeks
可调性FIXED
最大回动电压 10.4 V
标称回动电压 10.25 V
最大回动电压 20.4 V
最大绝对输入电压7.1 V
最大输入电压6.5 V
最小输入电压2.3 V
JESD-30 代码S-PDSO-N10
JESD-609代码e3
长度3 mm
湿度敏感等级1
功能数量1
输出次数2
端子数量10
工作温度TJ-Max125 °C
工作温度TJ-Min-40 °C
最大输出电流 10.3 A
最大输出电流 20.3 A
最大输出电压 12.545 V
最小输出电压 12.455 V
标称输出电压 12.5 V
最大输出电压 22.8504 V
最小输出电压 22.7496 V
标称输出电压 22.8 V
封装主体材料PLASTIC/EPOXY
封装代码HVSON
封装等效代码SOLCC10,.11,20
封装形状SQUARE
封装形式SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法TAPE AND REEL
峰值回流温度(摄氏度)260
认证状态Not Qualified
调节器类型FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
座面最大高度1 mm
表面贴装YES
技术CMOS
端子面层Matte Tin (Sn) - annealed
端子形式NO LEAD
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
最大电压容差1.8%
宽度3 mm

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DATASHEET
ISL9000A
Dual LDO with Low Noise, Very High PSRR and Low IQ
ISL9000A is a high performance dual LDO capable of sourcing
300mA current from each output. It has a low standby current
and very high PSRR and is stable with output capacitance of
1µF to 10µF with ESR of up to 200m.
The device integrates an individual Power-On-Reset (POR)
function for each output. The POR delay for VO2 can be
externally programmed by connecting a timing capacitor to the
CPOR pin. The POR delay for VO1 is internally fixed at
approximately 2ms. A reference bypass pin is also provided for
connecting a noise filtering capacitor for low noise and high-
PSRR applications.
The quiescent current is typically only 42µA with both LDO’s
enabled and active. Separate enable pins control each
individual LDO output. When both enable pins are low, the
device is in shutdown, typically drawing less than 0.1µA.
Several combinations of voltage outputs are standard. Output
voltage options for each LDO range from 1.5V to 3.3V. Other
output voltage options may be available upon request.
FN6391
Rev 3.00
October 15, 2015
Features
• Integrates two 300mA high performance LDOs
• Excellent transient response to large current steps
• ±1.8% accuracy over all operating conditions
• Excellent load regulation: < 0.1% voltage change across full
range of load current
• Low output noise: typically 30µV
RMS
@ 100µA (1.5V)
• Very high PSRR: 90dB @ 1kHz
• Extremely low quiescent current: 42µA (both LDOs active)
• Wide input voltage capability: 2.3V to 6.5V
• Low dropout voltage: typically 200mV @ 300mA
• Stable with 1µF to 10µF ceramic capacitors
• Separate enable and POR pins for each LDO
• Soft-start and staged turn-on to limit input current surge
during enable
• Current limit and overheat protection
• Tiny 10 Ld 3mmx3mm DFN package
• -40°C to +85°C operating temperature range
• Pb-free (RoHS compliant)
Applications
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Handheld Devices including Medical Handheld
ISL9000A
VIN (2.3 TO 6.5V)
1
ON
2
3
4
5
C1
C2
C3
VIN
EN1
EN2
CBYP
CPOR
VO1
VO2
POR2
POR1
GND
10
9
8
7
6
C4
C5
VO2 OK
VO2 TOO LOW
V
OUT1
OK
VO1 TOO LOW
VO1
VO2
RESET2
(200ms DELAY,
C3 = 0.01µF)
RESET1
(2ms DELAY)
ENABLE1
OFF ON
ENABLE2
OFF
C1, C4, C5: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X7R CERAMIC CAPACITOR
C3: 0.01µF X7R CERAMIC CAPACITOR
FIGURE 1. TYPICAL APPLICATION
FN6391 Rev 3.00
October 15, 2015
Page 1 of 14
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