Ordering number : ENA1955
LC87FBL08A
CMOS IC
8K-byte FROM and 256-byte RAM integrated
8-bit 1-chip Microcontroller
Overview
http://onsemi.com
The LC87FBL08A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time of
83.3ns, integrates on a single chip a number of hardware features such as 8K-byte flash ROM (On-board-
programmable), 256-byte RAM, an On-chip-debugger, sophisticated 16-bit timers/counters (may be divided into 8-bit
timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs), two 8-bit timers with a
prescaler, a base timer serving as a time-of-day clock, an asynchronous/synchronous SIO interface, two 12-bit PWM
channels, a 12-bit/8-bit 11-channel AD converter, a system clock frequency divider, an internal reset and a 17-source
9-vector interrupt feature.
Features
Flash
ROM
•
Capable of On-board programming with wide range (2.7 to 5.5V) of voltage source.
•
Block-erasable in 128 byte units
•
Writable in 2-byte units
•
8192
×
8 bits
RAM
•
256
×
9 bits
Minimum
Bus Cycle
•
83.3ns (12MHz at VDD=2.7V to 5.5V)
Note: The bus cycle time here refers to the ROM read speed.
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.00
52511HKIM 20110419-S00003 No.A1955-1/28
LC87FBL08A
Minimum
Instruction Cycle Time
•
250ns (12MHz at VDD=2.7V to 5.5V)
Ports
•
Normal withstand voltage I/O ports
Ports I/O direction can be designated in 1-bit units
Ports I/O direction can be designated in 4-bit units
•
Dedicated oscillator ports/input ports
•
Reset pin
•
Power pins
17 (P1n, P20, P21,P30, P31, P70 to P73, CF2/XT2)
8 (P0n)
1 (CF1/XT1)
1 (RES)
3 (VSS1, VSS2, VDD1)
Timers
•
Timer 0: 16-bit timer/counter with a capture register.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
+ 8-bit counter (with an 8-bit capture register)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)
Mode 3: 16-bit counter (with a 16-bit capture register)
•
Timer 1: 16-bit timer/counter that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/
counter with an 8-bit prescaler (with toggle outputs)
Mode 1: 8-bit PWM with an 8-bit prescaler
×
2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)
(toggle outputs also possible from the lower-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)
(The lower-order 8 bits can be used as PWM)
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler
output.
2) Interrupts are programmable in 5 different time schemes
SIO
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
AD
Converter: 12 bits/8 bits
×
11 channels
•
12 bits/8 bits AD converter resolution selectable
PWM:
Multifrequency 12-bit PWM
×
2 channels
Remote
Control Receiver Circuit (sharing pins with P73, INT3, and T0IN)
•
Noise rejection function (noise filter time constant selectable from 1 tCYC, 32 tCYC, and 128 tCYC)
Clock
Output Function
•
Capable generating clock outputs with a frequency of 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 of the source clock selected
as the system clock.
•
Capable generating the source clock for the subclock
Watchdog
Timer
•
Capable generating an internal reset on an overflow of a timer running on the low-speed RC oscillator clock or
subclock.
•
Operating mode at standby is selectable from 3 modes (continue counting/stop operation/stop counting with a
count value held).
No.A1955-2/28
LC87FBL08A
Interrupts
•
17 sources, 9 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4
INT3/INT5/base timer
T0H
T1L/T1H
None
SIO1
ADC/T6/T7/PWM4, PWM5
Port 0
Interrupt Source
•
Priority levels X > H > L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
Subroutine
Stack Levels: 128levels (The stack is allocated in RAM.)
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation
Circuits
•
Internal oscillation circuits
Low-speed RC oscillation circuit :
For system clock (100kHz)
Medium-speed RC oscillation circuit :
For system clock (1MHz)
Frequency variable RC oscillation circuit : For system clock (8MHz)
•
External oscillation circuits
Hi-speed CF oscillation circuit:
For system clock, with internal Rf
Low speed crystal oscillation circuit:
For low-speed system clock, with internal Rf
1) The CF and crystal oscillation circuits share the same pins. The active circuit is selected under program control.
2) Both the CF and crystal oscillator circuits stop operation on a system reset. After reset is released, oscillation
is stopped so start the oscillation operation by program.
System
Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and
76.8μs (at a main clock rate of 10MHz).
Internal
Reset Function
•
Power-on reset (POR) function
1) POR reset is generated only at power-on time.
2) The POR release level can be selected from 4 levels (2.57V, 2.87V, 3.86V, and 4.35V) through option
configuration.
•
Low-voltage detection reset (LVD) function
1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls
below a certain level.
2) The use or disuse of the LVD function and the low voltage threshold level (3 levels: 2.81V, 3.79V, 4.28V) can be
selected by optional configuration.
No.A1955-3/28
LC87FBL08A
Standby
Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of resetting the HALT mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer or low-voltage detection
(3) Occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, and crystal oscillators automatically stop operation.
2) There are four ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) System resetting by watchdog timer or low-voltage detection
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0.
•
X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The RC oscillator automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level.
(2) System resetting by watchdog timer or low-voltage detection.
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0.
(5) Having an interrupt source established in the base timer circuit.
Note: Available only when X’tal oscillation is selected.
Onchip
Debugger
•
Supports software debugging with the IC mounted on the target board.
•
Software break point setting for debugger.
•
Stepwise execution on debugger.
•
Real time RAM data monitoring function on debugger.
All the RAM data map can be monitored on screen when the program is running.
(The RAM & SFR data can be changed by screen patch when the program is running)
•
Two channels of on-chip debugger pins are available to be compatible with small pin count devices.
DBGP0 (P0), DBGP1 (P1)
Data
Security Function (flash versions only)
•
Protects the program data stored in flash memory from unauthorized read or copy.
Note: This data security function does not necessarily provide absolute data security.
Package
Form
•
QFP36(7×7) : Lead-/Halogen-free type
•
VQLP32(4×4) : Lead-/Halogen-free type (build-to-order )
Development
Tools
•
On-chip-debugger : (1) TCB87 TypeB + LC87FBL08A
(2) TCB87 TypeC (3 wire version) + LC87FBL08A
No.A1955-4/28
LC87FBL08A
Flash
ROM Programming Boards
Package
QFP36
VQLP32
Programming boards
W87F24Q
(build-to-order )
Flash
ROM Programmer
Maker
Single
Programmer
Flash Support Group, Inc.
(FSG)
Gang
Programmer
Flash Support Group, Inc.
(FSG)
+
Our company
(Note 1)
Single/Gang
Our company
Programmer
In-circuit/Gang
Programmer
In-circuit
Programmer
Model
AF9709/AF9709B/AF9709C
(Including Ando Electric Co., Ltd. models)
AF9723/AF9723B(Main body)
(Including Ando Electric Co., Ltd. models)
AF9833(Unit)
(Including Ando Electric Co., Ltd. models)
AF9101/AF9103(Main body)
(FSG models)
SIB87(Inter Face Driver)
(Our company model)
SKK / SKK Type B / SKK Type C
(SanyoFWS)
SKK-DBG Type B / SKK-DBG Type C
(SanyoFWS)
Application Version
1.06 or later
Chip Data Version
2.34 or later
LC87FBL08
(Note 2)
-
Supported version
Rev 03.28 or later
-
-
Device
87F008SU
-
-
For information about AF-Series:
Flash Support Group, Inc.
TEL: +81-53-459-1050
E-mail: sales@j-fsg.co.jp
Note1: On-board-programmer from FSG (AF9101/AF9103) and serial interface driver from Our company (SIB87)
together
can give a PC-less, standalone on-board-programming capabilities.
Note2: It needs a special programming devices and applications depending on the use of programming environment.
Please ask FSG or Our company for the information.
No.A1955-5/28
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