EXPOSED PAD (PIN 25) NOT GUARANTEED LOW IMPEDANCE TO GND,
ELECTRICAL CONNECTION OPTIONAL
ORDER INFORMATION
LEAD FREE FINISH
LTC4215CGN#PBF
LTC4215IGN#PBF
LTC4215CUFD#PBF
LTC4215IUFD#PBF
LTC4215CUFD-2#PBF
LTC4215IUFD-2#PBF
TAPE AND REEL
LTC4215CGN#TRPBF
LTC4215IGN#TRPBF
LTC4215CUFD#TRPBF
LTC4215IUFD#TRPBF
LTC4215CUFD-2#TRPBF
LTC4215IUFD-2#TRPBF
PART MARKING*
4215
4215I
4215
4215
42152
42152
PACKAGE DESCRIPTION
16-Lead Plastic TSSOP
16-Lead Plastic TSSOP
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
4215fe
2
LTC4215/LTC4215-2
ORDER INFORMATION
LEAD BASED FINISH
LTC4215CGN
LTC4215IGN
LTC4215CUFD
LTC4215IUFD
LTC4215CUFD-2
LTC4215IUFD-2
TAPE AND REEL
LTC4215CGN#TR
LTC4215IGN#TR
LTC4215CUFD#TR
LTC4215IUFD#TR
LTC4215CUFD-2#TR
LTC4215IUFD-2#TR
PART MARKING*
4215
4215I
4215
4215
42152
42152
PACKAGE DESCRIPTION
16-Lead Plastic TSSOP
16-Lead Plastic TSSOP
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
SYMBOL
Supplies
V
DD
V
OV(VDD)
I
DD
V
DD(UVL)
V
DD(HYST)
INTV
CC
INTV
CC(UVL)
INTV
CC(HYST)
ΔV
SENSE(TH)
ΔV
SENSE
Input Supply Range
Input Supply Overvoltage Threshold
Input Supply Current
Input Supply Undervoltage Lockout
Input Supply Undervoltage Lockout Hysteresis
Internal Regulator Voltage
INTV
CC
Undervoltage Lockout
INTV
CC
Undervoltage Lockout Hysteresis
Circuit Breaker Threshold (V
DD
– V
SENSE
)
Current Limit Voltage (V
DD
– V
SENSE
)
PARAMETER
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
l
l
l
l
l
l
l
l
l
MIN
2.9
15
2.75
75
2.9
2.55
20
22.5
22
6.5
65
15
300
10
4.7
–15
0.8
300
TYP
MAX
15
UNITS
V
V
mA
V
mV
V
V
mV
mV
mV
mV
mV
μs
μs
μA
V
μA
mA
mA
μs
V
15.6
3
2.84
100
3.1
2.64
55
25
25
10
75
20
420
20
5.9
–20
1
450
0.5
16.5
5
2.89
125
3.4
2.79
75
27.5
29
13
90
30
600
35
6.5
–30
1.6
700
1
4.7
V
DD
Rising
V
DD
≥ 3.3V
INTV
CC
Rising
Current Limit and Circuit Breaker
V
FB
= 1.3V
V
FB
= 0V
Start-Up Timer Expired
ΔV
SENSE
= 50mV, LTC4215
ΔV
SENSE
= 50mV, LTC4215-2
V
SENSE
= 12V
l
l
l
l
l
l
l
l
l
l
l
l
t
D(OC)
I
SENSE(IN)
Gate Drive
ΔV
GATE
I
GATE(UP)
I
GATE(DN)SLOW
I
GATE(DN)FAST
t
PHL(SENSE)
V
GS(POWERBAD)
OC Fault Filter
SENSE
+/–
Input Current
External N-Channel Gate Drive (V
GATE
– V
SOURCE
) V
DD
= 2.9V to 15V
(Note 3)
External N-Channel Gate Pull-Up Current
External N-Channel Gate Pulldown Current
Pulldown Current From GATE to SOURCE
During OC/UVLO
(V
DD
– SENSE) High to GATE Low
Gate-Source Voltage for Power Bad Fault
Gate On, V
GATE
= 0V
Gate Off, V
GATE
= 15V
V
DD
– SENSE = 100mV, V
GS
= 4V
V
DD
– SENSE = 100mV, C
GS
= 10nF
V
SOURCE
= 2.9V – 15V
3.8
4.3
4215fe
3
LTC4215/LTC4215-2
ELECTRICAL CHARACTERISTICS
SYMBOL
V
ON(TH)
ΔV
ON(HYST)
I
ON(IN)
V
EN(TH)
ΔV
EN(HYST)
I
EN
V
OV(TH)
ΔV
OV(HYST)
I
OV(IN)
V
UV(TH)
ΔV
UV(HYST)
I
UV(IN)
V
UV(RTH)
ΔV
UV(RHYST)
V
FB
ΔV
FB(HYST)
I
FB
V
GPIO(TH)
V
GPIO(OL)
I
GPIO(OH)
I
SOURCE
t
P(GATE)
t
D(GATE)
PARAMETER
ON Pin Threshold Voltage
ON Pin Hysteresis
ON Pin Input Current
EN
Input Threshold
EN
Hysteresis
EN
Pin Input Current
OV Pin Threshold Voltage
OV Pin Hysteresis
OV Pin Input Current
UV Pin Threshold Voltage
UV Pin Hysteresis
UV Pin Input Current
UV Pin Reset Threshold Voltage
UV Pin Reset Threshold Hysteresis
Foldback Pin Power Good Threshold
FB Pin Power Good Hysteresis
Foldback Pin Input Current
GPIO Pin Input Threshold
GPIO Pin Output Low Voltage
GPIO Pin Input Leakage Current
SOURCE Pin Input Current
Input (ON, OV, UV,
EN)
to GATE Off
Propagation Delay
Turn-On Delay
ON
UV, OV,
EN
Overcurrent Auto-Retry
FB = 1.8V
V
GPIO
Rising
I
GPIO
= 5mA
V
GPIO
= 15V
SOURCE = 15V
FB Rising
V
UV
= 1.8V
V
UV
Falling
V
OV
= 1.8V
V
UV
Rising
EN
= 3.5V
V
OV
Rising
V
ON
= 1.2V
V
EN
= Rising
Comparator Inputs
V
ON
Rising
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
MIN
1.210
60
1.215
50
1.215
10
1.215
60
0.33
60
1.215
3
0.8
TYP
1.235
128
0
1.235
128
0
1.235
30
0
1.235
80
0
0.4
125
1.235
8
0
1
0.25
0
40
80
3
1
100
5
0.2
1.235
–100
2
50
–10
–0.7
MAX
1.26
180
±1
1.255
200
±1
1.255
40
±1
1.255
100
±1
0.47
210
1.255
15
±1
1.2
0.5
±1
120
5
2
150
75
0.23
1.26
–120
2.6
60
–12.5
–1.0
μA
μA
Bits
0.5
0.2
0.2
2
1.25
1.25
±2.0
±1.0
±1.0
LSB
LSB
LSB
LSB
LSB
LSB
4215fe
UNITS
V
mV
μA
V
mV
μA
V
mV
μA
V
mV
μA
V
mV
V
mV
μA
V
V
μA
μA
μs
μs
ms
s
V
V
μA
μA
Other Pin Functions
50
2.5
0.17
1.2
–80
1.4
40
–7.5
–0.4
8
–2
–1.25
–1.25
V
TIMERL(TH)
V
TIMERH(TH)
I
TIMER(UP)
I
TIMER(DOWN)
I
SS
ADC
RES
INL
Timer Low Threshold
Timer High Threshold
TIMER Pin Pull-Up Current
TIMER Pin Pulldown Current for OC Auto-Retry
Soft-Start Ramp Pull-Up Current
Ramping
Waiting for GATE to Slew
I
TIMER(UP/DOWN)
TIMER Current Up/Down Ratio
Resolution (No Missing Codes)
Integral Nonlinearity
V
DD
– SENSE (Note 5)
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
l
l
l
l
l
l
V
OS
Offset Error (Note 4)
4
LTC4215/LTC4215-2
ELECTRICAL CHARACTERISTICS
SYMBOL
TUE
PARAMETER
Total Unadjusted Error
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
ADIN
= 1.28V
V
ADIN
= 1.28V
l
l
l
l
l
l
l
l
l
l
l
MIN
TYP
MAX
±5.5
±5.0
±5.0
±5.5
±5.0
±5.0
UNITS
LSB
LSB
LSB
LSB
LSB
LSB
mV
V
V
MΩ
μA
Hz
FSE
Full-Scale Error
V
FS
Full-Scale Voltage (255 • V
LSB
)
37.625
15.14
1.205
1
38.45
15.44
1.23
2
0
10
39.275
15.74
1.255
±0.1
R
ADIN
I
ADIN
I
2
C Interface
V
ADR(H)
I
ADR(IN,Z)
V
ADR(L)
I
ADR(IN)
I
ALERT
V
ALERT(OL)
V
SDA,SCL(TH)
I
SDA,SCL(OH)
V
SDA(OL)
f
SCL(MAX)
t
BUF(MIN)
t
HD,STA(MIN)
t
SU,STA(MIN)
t
SU,STO(MIN)
t
HD,DAT(MIN)
t
HD,DATO
t
SU,DAT(MIN)
t
SP
C
X
ADIN Pin Sampling Resistance
ADIN Pin Input Current
Conversion Rate
ADR0, ADR1, ADR2 Input High Voltage
ADR0, ADR1, ADR2 Hi-Z Input Current
ADR0, ADR1, ADR2 Input Low Voltage
ADR0, ADR1, ADR2 Input Current
ALERT
Input Current
ALERT
Output Low Voltage
SDA, SCL Input Threshold
SDA, SCL Input Current
SDA Output Low Voltage
SCL Clock Frequency
Bus Free Time Between Stop/Start Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time (Input)
Data Hold Time (Output)
Data Set-Up Time
Suppressed Spike Pulse Width
SCL, SDA Input Capacitance
l
INTV
CC
–0.8
3
0.2
–80
INTV
CC
–0.4
INTV
CC
–0.2
–3
V
μA
μA
V
μA
μA
V
V
μA
V
kHz
ADR0, ADR1, ADR2 = 0.8V
ADR0, ADR1, ADR2 = INTV
CC
– 0.8V
ADR0, ADR1, ADR2 = 0V, INTV
CC
ALERT
= 6.5V
I
ALERT
= 3mA
SCL, SDA = 6.5V
I
SDA
= 3mA
Operates with f
SCL
≤ f
SCL(MAX)
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
0.4
0.8
80
±1
0.2
1.3
1.7
0.2
400
1000
0.12
30
30
140
30
300
50
500
30
110
0.4
1.9
±1
0.4
I
2
C Interface Timing
1.3
600
600
600
100
900
600
250
10
μs
ns
ns
ns
ns
ns
ns
ns
pF
SDAI Tied to SDAO (Note 6)
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive; all voltages are referenced to
GND unless otherwise specified.
Note 3:
An internal clamp limits the GATE pin to a minimum of 5V above
SOURCE. Driving this pin to voltages beyond the clamp may damage the device.
Note 4:
Offset error is the offset voltage measured from 1LSB when the
output code flickers between 0000 0000 and 0000 0001.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
precise analog input voltage. Maximum specifications are limited by the
LSB step size and the single shot measurement. Typical specifications are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
我最近在《华尔街日报》看到一篇题为“我们需要能维修自己的电子小玩意儿的权利(We need the right to repair our gadgets)”的文章(参考原文：)，作者对于众多电子产品看来是“有计画的废弃(planned obsolescence)”之现象非常愤怒，认为大众应该要求电子产品可以被维修。 但实际的情况是，举例来说，家家都有的电视机如果故障了，修理费用可能...[详细]
编译自semiengineering 业界越来越关注人工智能的功耗问题，但这个问题并没有简单的解决方案。这需要深入了解应用、半导体和系统层面的软件和硬件架构，以及所有这些的设计和实现方式。每个环节都会影响总功耗和提供的效用。这是最终必须做出的权衡。 但首先，必须解决效用问题。电力是否被浪费了？“我们将电力用于有价值的用途，”Ansys（现为新思科技旗下公司）产品营销总监 Marc Swi...[详细]
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
