Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/.
Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
Table 1. Comparison of LTC3838 Options
PART NUMBER
LTC3838
DESCRIPTION
±0.67% Differential Output Regulation on Channel 1
±1% Output Regulation on Channel 2
Separate-Per-Channel Continuous 30mV to 100mV Current Sense Range Controls
±0.67% and ±0.75%, Both Differential Output Regulation on Channel 1 and 2
Single-Pin 30mV/60mV Current Sense Range Control, Improved Current Limit Accuracy Than LTC3838
±0.67% Differential Output Regulation with Internal Reference on Channel 1
±4mV Differential Output Regulation with External Reference Voltage on Channel 2
Fixed 30mV Current Sense Range, Improved Current Limit Accuracy Than LTC3838
LTC3838-1
LTC3838-2
RUN2
DTR2
38381fa
2
For more information
www.linear.com/3838-1
LTC3838-1
elecTrical characTerisTics
SYMBOL
V
IN
V
OUT1,2
I
Q
PARAMETER
Input Voltage Operating Range
Regulated Output Voltage Operating Range
V
OUT1
Regulated Differentially with
Respect to V
OUTSENSE1–
, V
OUT2
Regulated
Differentially with Respect to V
DFB2–
MODE/PLLIN = 0V, No Load
RUN1 or RUN2 (But Not Both) = 0V
RUN1 = RUN2 = 0V
ITH1 = 1.2V, V
OUTSENSE1–
= 0V (Note 5)
T
A
= 25°C
T
A
= 0°C to 85°C
T
A
= –40°C to 125°C
V
IN
= 4.5V to 38V, ITH1 = 0.5V to 1.9V,
–0.5V < V
OUTSENSE1–
< 0.5V (Note 5)
T
A
= 0°C to 85°C
T
A
= –40°C to 125°C
–0.2V < V
OUTSENSE1–
< 0.2V
T
A
= 0°C to 85°C
T
A
= –40°C to 125°C
ITH2 = 1.2V, V
DFB2–
= 0V (Note 5)
T
A
= 25°C
T
A
= 0°C to 85°C
T
A
= –40°C to 125°C
V
IN
= 4.5V to 38V, ITH2 = 0.5V to 1.9V,
–0.2V < V
DFB2–
< 0.2V (Note 5)
T
A
= 0°C to 85°C
T
A
= –40°C to 125°C
V
OUTSENSE1+
= 0.6V, V
OUTSENSE1–
= 0V
V
OUTSENSE1+
= 0.6V, V
OUTSENSE1–
= 0V
V
DFB2+
= 0.3V, V
DFB2–
= 0V
V
DFB2+
= 0.3V, V
DFB2–
= 0V
V
IN
= 38V, V
OUT
= 0.6V, R
T
= 20k (Note 6)
(Note 6)
V
RNG
= 0V, V
FB
= 0.57V, V
SENSE–
= 2.5V
V
RNG
= INTV
CC
, V
FB
= 0.57V, V
SENSE–
= 2.5V
V
RNG
= 0V, V
FB
= 0.63V, V
SENSE–
= 2.5V
V
RNG
= INTV
CC
, V
FB
= 0.63V, V
SENSE–
= 2.5V
V
SENSE+
= 0.6V
V
SENSE+
= 5V
V
SENSE–
= 0.6V
V
SENSE–
= 5V
l
l
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 15V unless otherwise noted (Note 3).
CONDITIONS
MIN
4.5
0.6
TYP
MAX
38
5.5
UNITS
V
V
Main Control Loops
Input DC Supply Current
Both Channels Enabled
Only One Channel Enabled
Shutdown Supply Current
Regulated Feedback Voltage on Channel 1
(V
OUTSENSE1+
– V
OUTSENSE1–
)
Regulated Feedback Voltage on Channel 1 Over
Line, Load and Common Mode
3
2
15
0.5985
0.596
0.594
0.6
0.6
0.6
0.6015
0.604
0.606
mA
mA
µA
V
V
V
V
FB1
l
l
l
l
0.594
0.591
0.6
0.6
0.6
0.6
0.6
0.6
0.6
0.606
0.609
0.6045
0.606
0.602
0.6045
0.606
V
V
V
V
V
V
V
l
0.5955
l
0.594
V
FB2
Regulated Feedback Voltage on Channel 2
(2 • V
DFB2+
– V
DFB2–
)
Regulated Feedback Voltage on Channel 2 Over
Line, Load and Common Mode
l
0.5955
l
0.594
0.598
l
0.5955
l
0.594
0.6
0.6
0
–25
0
–6
1.7
30
90
0.6045
0.606
±25
–50
±25
–12
V
V
nA
µA
nA
µA
mS
ns
ns
I
VOUTSENSE1+
I
VOUTSENSE1–
I
VDFB2+
I
VDFB2–
g
m(EA)1,2
t
ON(MIN)1,2
t
OFF(MIN)1,2
V
OUTSENSE1+
Input Bias Current
V
OUTSENSE1–
Input Bias Current
V
DFB2+
Input Bias Current
V
DFB2–
Input Bias Current
Minimum Top Gate On-Time
Minimum Top Gate Off-Time
Error Amplifier Transconductance (∆I
TH1,2
/∆V
FB1,2
) ITH = 1.2V (Note 5)
Current Sensing
V
SENSE(MAX)1,2
Maximum Valley Current Sense Threshold
(V
SENSE1,2+
– V
SENSE1,2–
)
V
SENSE(MIN)1,2
Minimum Valley Current Sense Threshold
(V
SENSE1,2+
– V
SENSE1,2–
)
(Forced Continuous Mode)
I
SENSE1,2+
I
SENSE1,2–
SENSE1,2
+
Pins Input Bias Current
SENSE1,2
–
Pins Input Bias Current (Internal 500k
Resistor to SGND)
24
54
30
61
–15
–30
±5
1
1.2
10
±50
±2
36
69
mV
mV
mV
mV
nA
µA
µA
µA
38381fa
For more information
www.linear.com3838-1
3
LTC3838-1
elecTrical characTerisTics
SYMBOL
V
RUN1,2
I
RUN1,2
UVLO
I
TRACK/SS1,2
f
PARAMETER
RUN Pin On Threshold
RUN Pin On Hysteresis
RUN Pin Pull-Up Current When Off
RUN Pin Pull-Up Current Hysteresis
INTV
CC
Undervoltage Lockout
Soft-Start Pull-Up Current
Clock Output Frequency
(Steady-State Switching Frequency)
Channel 2 Phase (Relative to Channel 1)
Start-Up and Shutdown
V
RUN1,2
Rising
V
RUN1,2
Falling from On Threshold
RUN1,2 = SGND
I
RUN1,2(HYS)
= I
RUN1,2(ON)
– I
RUN1,2(OFF)
INTV
CC
Falling
INTV
CC
Rising
0V < TRACK/SS1,2 < 0.6V
R
T
= 205k
R
T
= 80.6k
R
T
= 18.2k
PHASMD = SGND
PHASMD = Floating
PHASMD = INTV
CC
PHASMD = SGND
PHASMD = Floating
PHASMD = INTV
CC
2
0.5
With Respect to SGND
TG High
TG Low
BG High
BG Low
(Note 6)
(Note 6)
6V < V
IN
< 38V
I
DRVCC1
= 0mA to –100mA
EXTV
CC
Rising
V
EXTVCC
= 5V, I
DRVCC2
= –100mA
V
FB1,2
Rising from Regulated Voltage
V
FB1,2
Falling from Regulated Voltage
V
FB1,2
Returning to Regulated Voltage
I
PGOOD
= 2mA
5
–5
4.4
5.0
600
2.5
1.2
2.5
0.8
20
15
5.3
–1.5
4.6
200
200
7.5
–7.5
2.5
0.1
50
20
0.3
10
–10
5.6
–3
4.8
l
l
l
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 15V unless otherwise noted (Note 3).
CONDITIONS
MIN
1.1
TYP
1.2
100
1.2
5
3.3
3.7
4.2
1
200
500
2000
180
180
240
60
90
120
4.5
MAX
1.3
UNITS
V
mV
µA
µA
V
V
µA
kHz
kHz
kHz
Deg
Deg
Deg
Deg
Deg
Deg
V
V
kΩ
Ω
Ω
Ω
Ω
ns
ns
V
%
V
mV
mV
%
%
%
V
µs
µs
Frequency and Clock Synchronization
450
550
CLKOUT Phase (Relative to Channel 1)
V
PLLIN(H)
V
PLLIN(L)
R
MODE/PLLIN
Gate Drivers
R
TG(UP)1,2
R
TG(DOWN)1,2
R
BG(UP)1,2
R
BG(DOWN)1,2
t
D(TG/BG)1,2
t
D(BG/TG)1,2
V
DRVCC1
V
EXTVCC
Clock Input High Level Into MODE/PLLIN
Clock Input Low Level Into MODE/PLLIN
MODE/PLLIN Input DC Resistance
TG Driver Pull-Up On Resistance
TG Driver Pull-Down On Resistance
BG Driver Pull-Up On Resistance
BG Driver Pull-Down On Resistance
Top Gate Off to Bottom Gate On Delay Time
Bottom Gate Off to Top Gate On Delay Time
Internally Regulated DRV
CC1
Voltage
DRV
CC1
Load Regulation
EXTV
CC
Switchover Voltage
EXTV
CC
Switchover Hysteresis
EXTV
CC
to DRV
CC2
Voltage Drop
Internal V
CC
Regulator
PGood Output
OV
UV
V
PGOOD(L)1,2
t
D(PGOOD)1,2
PGOOD Overvoltage Threshold
PGOOD Undervoltage Threshold
PGOOD Threshold Hysteresis
PGOOD Low Voltage
Delay from V
FB
Fault (OV/UV) to PGOOD Falling
Delay from V
FB
Good (OV/UV Cleared) to PGOOD
Rising
38381fa
4
For more information
www.linear.com/3838-1
LTC3838-1
elecTrical characTerisTics
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in Watts) according to
the formula:
T
J
= T
A
+ (P
D
•
θ
JA
)
where
θ
JA
(in °C/W) is the package thermal impedance.
Note 3:
The LTC3838-1 is tested under pulsed load conditions such that T
J
≈ T
A
. The LTC3838E-1 is guaranteed to meet specifications over the 0°C to
85°C operating junction temperature range. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3838I-1 is guaranteed to meet specifications over the –40°C to 125°C
operating junction temperature range . Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
Note 4:
This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 5:
The LTC3838-1 is tested in a feedback loop that adjusts voltages
on the V
OUTSENSE1+
and V
DFB2+
pins to achieve specified error amplifier
output voltages (ITH1,2).
In order to simplify the total system error computation, the regulated
voltage is defined in one combined specification which includes the effects
of line, load and common mode variation. The combined regulated voltage
specification is tested by independently varying line, load, and common
mode, which by design do not significantly affect one another. For any
combination of line, load, and common mode variation, the regulated
voltage should be within the limits specified that are tested in production
to the following conditions:
Line: V
IN
= 4.5V to 38V, ITH = 1.2V, V
OUTSENSE1–
= 0V, V
DFB2–
= 0V
Load: V
IN
= 15V, ITH = 0.5V to 1.9V, V
OUTSENSE1–
= 0V, V
DFB2–
= 0V
Common Mode: V
IN
= 15V, ITH = 1.2V, V
OUTSENSE1–
= ±0.5V, ±0.2V,
V
DFB2–
= ±0.2V
Note 6:
Delay times are measured with top gate (TG) and bottom gate
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