EPC8005 – Enhancement Mode Power Transistor
Preliminary Specification Sheet
Features:
•
V
DS
, 65V
•
R
DS(on)
, 275 mΩ
•
I
D
, 2.9 A
•
Optimized eGaN® FET for high frequency applications
•
Pb-Free (RoHS Compliant), Halogen Free
Applications:
•
Ultra high speed DC-DC conversion
•
RF Envelope Tracking
•
Wireless Power Transfer
•
Game console and industrial movement sensing (LiDAR)
MAXIMUM RATINGS
EPC8005 eGaN FETs are supplied only in
passivated die form with solder bars
STATIC CHARACTERISTICS
T
J
= 25 °C unless otherwise stated
Specifications are with Substrate shorted to Source where applicable
Subject to Change without Notice
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EPC8005 – Enhancement Mode Power Transistor
Preliminary Specification Sheet
DYNAMIC CHARACTERISTICS
T
J
= 25 °C unless otherwise stated
Specifications are with Substrate shorted to Source where applicable
THERMAL CHARACTERISTICS
Note 1: R
θJA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See
http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf
for details.
Subject to Change without Notice
www.epc-co.com
COPYRIGHT 2013
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EPC8005 – Enhancement Mode Power Transistor
Preliminary Specification Sheet
Figure 1:
Figure 2:
Figure 3:
Figure 4:
Figure 5a:
Figure 5b:
Linear Scale
Subject to Change without Notice
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COPYRIGHT 2013
Log Scale
Page 3
EPC8005 – Enhancement Mode Power Transistor
Preliminary Specification Sheet
Figure 6:
Figure 7:
Figure 8:
Figure 9:
All measurements were done with substrate shorted to source
Subject to Change without Notice
www.epc-co.com
COPYRIGHT 2013
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EPC8005 – Enhancement Mode Power Transistor
Preliminary Specification Sheet
S-PARAMETER CHARACTERISTICS
V
GSQ
= 1.5 V, V
DSQ
= 30 V, I
DQ
= 0.25 A
Pulsed measurement, Heat-Sink Installed, Z
0
= 50 Ω
Figure 10: Smith Chart
Figure 11: Gain Chart
Frequency
[MHz]
200
500
1000
1200
1500
2000
2400
3000
Download S-parameter files at
www.epc-co.com
Table 1: S-Parameter Table
Gate (Z
GS
)
[Ω]
2.92 – j20.49
1.86 – j8.15
1.11 – j2.48
0.95 – j1.07
0.92 + j0.68
1.02 + j3.11
1.29 + j5.16
1.80 + j9.03
Drain (Z
DS
)
[Ω]
42.43 – j50.08
10.61 – j31.19
2.74 – j15.14
1.96 – j11.73
1.84 – j7.78
2.53 – j3.42
3.36 – j1.07
4.29 + j1.95
Figure 12: Device Reflection
Figure 13: Taper and Reference Plane details – Device Connection
Subject to Change without Notice
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COPYRIGHT 2013
Page 5