DATASHEET
ISL6612, ISL6613
Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features
The ISL6612 and ISL6613 are high frequency MOSFET
drivers specifically designed to drive upper and lower power
N-Channel MOSFETs in a synchronous rectified buck
converter topology. These drivers combined with HIP63xx or
ISL65xx Multi-Phase Buck PWM controllers and N-Channel
MOSFETs form complete core-voltage regulator solutions for
advanced microprocessors.
The ISL6612 drives the upper gate to 12V, while the lower
gate can be independently driven over a range from 5V to
12V. The ISL6613 drives both upper and lower gates over a
range of 5V to 12V. This drive-voltage provides the flexibility
necessary to optimize applications involving trade-offs
between gate charge and conduction losses.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs from
conducting simultaneously and to minimize the dead time.
These products add an overvoltage protection feature
operational before VCC exceeds its turn-on threshold, at which
the PHASE node is connected to the gate of the low side
MOSFET (LGATE). The output voltage of the converter is then
limited by the threshold of the low side MOSFET, which
provides some protection to the microprocessor if the upper
MOSFET(s) is shorted during startup. The over-temperature
protection feature prevents failures resulting from excessive
power dissipation by shutting off the outputs when its junction
temperature exceeds +150°C (typically). The driver resets once
its junction temperature returns to +108°C (typically).
These drivers also feature a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
FN9153
Rev 9.00
June 15, 2010
Features
• Pin-to-pin Compatible with HIP6601 SOIC family for Better
Performance and Extra Protection Features
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of r
DS(ON)
Conduction Offset Effect
• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
• 36V Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 2MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Overvoltage Protection
• VCC Undervoltage Protection
• Over Temperature Protection (OTP) with +42°C
Hysteresis
• Expandable Bottom Copper Pad for Enhanced Heat
Sinking
• Dual Flat No-Lead (DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free Available (RoHS Compliant)
Applications
• Core Regulators for Intel® and AMD® Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB417 for Power Train Design, Layout
Guidelines, and Feedback Compensation Design
FN9153 Rev 9.00
June 15, 2010
Page 1 of 12
ISL6612, ISL6613
Ordering Information
PART
NUMBER
ISL6612CBZ (Note 2)
ISL6612CBZ-T (Notes 1, 2)
ISL6612CBZA (Note 2)
ISL6612CBZA-T (Notes 1, 2)
ISL6612CRZ (Note 2)
ISL6612CRZ-T (Notes 1, 2)
ISL6612ECB-T (Note 1)
ISL6612ECBZ (Note 2)
ISL6612ECBZ-T (Notes 1, 2)
ISL6612EIBZ (Note 2)
ISL6612EIBZ-T (Notes 1, 2)
ISL6612IBZ (Note 2)
ISL6612IBZ-T (Notes 1, 2)
ISL6612IRZ (Note 2)
ISL6612IRZ-T (Notes 1, 2)
ISL6613CBZ (Note 2)
ISL6613CBZ-T (Notes 1, 2)
ISL6613CRZ (Note 2)
ISL6613CRZ-T (Notes 1, 2)
ISL6613ECBZ (Note 2)
ISL6613ECBZ-T (Notes 1, 2)
ISL6613EIBZ (Note 2)
ISL6613EIBZ-T (Notes 1, 2)
ISL6613IBZ (Note 2)
ISL6613IBZ-T (Notes 1, 2)
ISL6613IRZ (Note 2)
ISL6613IRZ-T (Notes 1, 2)
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3.
For Moisture Sensitivity Level (MSL), please see device information page for
ISL6612, ISL6613.
For more information on MSL please see
techbrief
TB363.
PART
MARKING
6612 CBZ
6612 CBZ
6612 CBZ
6612 CBZ
612Z
612Z
ISL66 12ECB
6612 ECBZ
6612 ECBZ
6612 EIBZ
6612 EIBZ
6612 IBZ
6612 IBZ
12IZ
12IZ
6613 CBZ
6613 CBZ
613Z
613Z
6613 ECBZ
6613 ECBZ
6613 EIBZ
6613 EIBZ
6613 IBZ
6613 IBZ
13IZ
13IZ
TEMP. RANGE
(°C)
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
8 Ld EPSOIC
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld EPSOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
8 Ld SOIC (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
10 Ld 3x3 DFN (Pb-Free)
PKG.
DWG. #
M8.15
M8.15
M8.15
M8.15
L10.3x3
L10.3x3
M8.15B
M8.15B
M8.15B
M8.15B
M8.15B
M8.15
M8.15
L10.3x3
L10.3x3
M8.15
M8.15
L10.3x3
L10.3x3
M8.15B
M8.15B
M8.15B
M8.15B
M8.15
M8.15
L10.3x3
L10.3x3
FN9153 Rev 9.00
June 15, 2010
Page 2 of 12
ISL6612, ISL6613
Pinouts
ISL6612CB, ISL6613CB
(8 LD SOIC)
ISL6612ECB, ISL6613ECB
(8 LD EPSOIC)
TOP VIEW
UGATE
BOOT
PWM
GND
1
2
3
4
GND
8
7
6
5
PHASE
PVCC
VCC
LGATE
ISL6612CR, ISL6613CR
(10 LD 3x3 DFN)
TOP VIEW
UGATE
BOOT
N/C
PWM
GND
1
2
3
4
5
GND
10 PHASE
9 PVCC
8
7
N/C
VCC
6 LGATE
Block Diagram
ISL6612 AND ISL6613
UVCC
VCC
+5V
10k
PWM
POR/
CONTROL
8k
LOGIC
OTP AND
PRE-POR OVP
FEATURES
BOOT
UGATE
PHASE
(LVCC)
PVCC
SHOOT-
THROUGH
PROTECTION
UVCC = VCC FOR ISL6612
UVCC = PVCC FOR ISL6613
LGATE
GND
PAD
FOR DFN AND EPSOIC-DEVICES, THE PAD ON THE BOTTOM SIDE OF
THE PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.
FN9153 Rev 9.00
June 15, 2010
Page 3 of 12
ISL6612, ISL6613
Typical Application - 3 Channel Converter Using ISL65xx and ISL6612 Gate Drivers
+12V
+5V TO 12V
VCC
PVCC
PWM
ISL6612
BOOT
UGATE
PHASE
LGATE
GND
+5V TO 12V
+12V
+5V
VCC
VFB
VSEN
PGOOD
VCC
COMP
PVCC
PWM1
PWM2
PWM3
LGATE
MAIN
CONTROL
ISL65xx
GND
PWM
ISL6612
BOOT
UGATE
PHASE
+V
CORE
VID
ISEN1
ISEN2
FS
ISEN3
GND
+5V TO 12V
+12V
VCC
PVCC
PWM
ISL6612
BOOT
UGATE
PHASE
LGATE
GND
FN9153 Rev 9.00
June 15, 2010
Page 4 of 12
ISL6612, ISL6613
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
Input Voltage (V
PWM
) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
BOOT Voltage (V
BOOT-GND
). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
BOOT To PHASE Voltage (V
BOOT-PHASE
) . . . . . -0.3V to 15V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V (<10ns, 10µJ)
UGATE. . . . . . . . . . . . . . . . . . . V
PHASE
- 0.3V
DC
to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2µJ) to V
BOOT
+ 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V
DC
to V
PVCC
+ 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to V
PVCC
+ 0.3V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3VDC to 24VDC
GND - 8V (<400ns, 20µJ) to 31V (<200ns, V
BOOT-GND
< 36V)
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
8 Ld SOIC Package (Note 4) . . . . . . . .
100
N/A
8 Ld EPSOIC Package (Notes 5, 6). . .
50
7
10 Ld DFN Package (Notes 5, 6) . . . . .
48
7
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V
10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air.
5.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
6. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Bias Supply Current
Recommended Operating Conditions, Unless Otherwise Noted.
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 8) TYP (Note 8) UNITS
I
VCC
I
VCC
ISL6612, f
PWM
= 300kHz, V
VCC
= 12V
ISL6613, f
PWM
= 300kHz, V
VCC
= 12V
ISL6612, f
PWM
= 1MHz, V
VCC
= 12V
ISL6613, f
PWM
= 1MHz, V
VCC
= 12V
ISL6612, f
PWM
= 300kHz, V
PVCC
= 12V
ISL6613, f
PWM
= 300kHz, V
PVCC
= 12V
ISL6612, f
PWM
= 1MHz, V
PVCC
= 12V
ISL6613, f
PWM
= 1MHz, V
PVCC
= 12V
-
-
-
-
-
-
-
-
7.2
4.5
11
5
2.5
5.2
7
13
-
-
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
mA
mA
Gate Drive Bias Current
I
PVCC
I
PVCC
POWER-ON RESET AND ENABLE
VCC Rising Threshold
VCC Rising Threshold
VCC Falling Threshold
VCC Falling Threshold
PWM INPUT (See “TIMING DIAGRAM” on page 7)
Input Current
I
PWM
V
PWM
= 5V
V
PWM
= 0V
PWM Rising Threshold
PWM Falling Threshold
Typical Three-State Shutdown Window
Three-State Lower Gate Falling Threshold
Three-State Lower Gate Rising Threshold
Three-State Upper Gate Rising Threshold
Three-State Upper Gate Falling Threshold
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
-
-
-
-
1.80
-
-
-
-
1.50
1.00
3.20
2.60
450
-400
3.00
2.00
-
-
-
-
2.40
-
-
-
-
µA
µA
V
V
V
V
V
V
V
T
A
= 0°C to +85°C
T
A
= -40°C to +85°C
T
A
= 0°C to +85°C
T
A
= -40°C to +85°C
9.35
8.35
7.35
6.35
9.80
9.80
7.60
7.60
10.00
10.00
8.00
8.00
V
V
V
V
FN9153 Rev 9.00
June 15, 2010
Page 5 of 12
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
