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ISL6612BIBZ-T

产品描述IC MOSFET DRVR SYNC BUCK 8-SOIC
产品类别模拟混合信号IC    驱动程序和接口   
文件大小679KB,共12页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
标准
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ISL6612BIBZ-T概述

IC MOSFET DRVR SYNC BUCK 8-SOIC

ISL6612BIBZ-T规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Renesas(瑞萨电子)
零件包装代码SOIC
包装说明ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8
针数8
Reach Compliance Codecompliant
ECCN代码EAR99
高边驱动器YES
接口集成电路类型HALF BRIDGE BASED MOSFET DRIVER
JESD-30 代码R-PDSO-G8
JESD-609代码e3
长度4.9 mm
湿度敏感等级3
功能数量1
端子数量8
最高工作温度85 °C
最低工作温度-40 °C
标称输出峰值电流3 A
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP8,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
电源5/12,12 V
认证状态Not Qualified
座面最大高度1.75 mm
最大供电电压13.2 V
最小供电电压7 V
标称供电电压12 V
电源电压1-最大13.2 V
电源电压1-分钟5 V
电源电压1-Nom12 V
表面贴装YES
温度等级INDUSTRIAL
端子面层Matte Tin (Sn) - annealed
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
宽度3.9 mm
Base Number Matches1

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ISL6612B, ISL6613B
NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PARTS
ISL6622A, ISL6622B
DATASHEET
FN9205
Rev.4.00
May 1, 2012
Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP
The ISL6612B and ISL6613B are high frequency MOSFET
drivers specifically designed to drive upper and lower power
N-Channel MOSFETs in a synchronous rectified buck
converter topology. These drivers combined with HIP63xx or
ISL65xx Multi-Phase Buck PWM controllers and N-Channel
MOSFETs form complete core-voltage regulator solutions for
advanced microprocessors.
The ISL6612B drives the upper gate to above rising VCC
POR (7V), while the lower gate can be independently driven
over a range from 5V to 12V. The ISL6613B drives both
upper and lower gates over a range of 5V to 12V. This drive-
voltage provides the flexibility necessary to optimize
applications involving trade-offs between gate charge and
conduction losses. These drivers are optimized for POL
DC/DC Converters for IBA Systems.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. These products add an overvoltage protection feature
operational before VCC exceeds its turn-on threshold, at
which the PHASE node is connected to the gate of the low
side MOSFET (LGATE). The output voltage of the converter
is then limited by the threshold of the low side MOSFET,
which provides some protection to the microprocessor if the
upper MOSFET(s) is shorted during initial start-up.
These drivers also feature a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
Features
• Pin-to-pin Compatible with HIP6601 SOIC family
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Low VCC Rising Threshold (7V) for IBA Applications.
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of r
DS(ON)
Conduction Offset Effect
• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
• 36V Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 2MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Overvoltage Protection
• VCC Undervoltage Protection
• Expandable Bottom Copper Pad for Enhanced Heat
Sinking
• Dual Flat No-Lead (DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free (RoHS Compliant)
Applications
• Optimized for POL DC/DC Converters for IBA Systems
• Core Regulators for Intel
®
and AMD
®
Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB417 for Power Train Design, Layout
Guidelines, and Feedback Compensation Design
FN9205 Rev.4.00
May 1, 2012
Page 1 of 12
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