NOT RECOMMENDED FOR NEW DESIGNS
SEE ISL6414
DATASHEET
FN9081
Rev 2.00
Nov 24, 2003
ISL6411
Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit
The ISL6411 is an ultra low noise triple output LDO regulator
with microprocessor reset circuit and is optimized for
powering wireless chip sets. The IC accepts an input voltage
range of 3.0V to 3.6V and provides three regulated output
voltages: 1.8V (LDO1), 2.84V (LDO2), and another ultra
clean 2.84V (LDO3). On chip logic provides sequencing
between LDO1 and LDO2 for BBP/MAC and I/O supply
voltage outputs. LDO3 features ultra low noise that does not
typically exceed 30µV RMS to aid VCO stability. High
integration and the thin Quad Flat No-lead (QFN) package
makes ISL6411 an ideal choice to power many of today’s
small form factor industry standard wireless cards, such as
PCMCIA, mini-PCI and Cardbus-32.
The ISL6411 uses an internal PMOS transistor as the pass
device. The SHDN pin controls LDO1 and LDO2 outputs
whereas SHDN3 controls LDO3 output. Internal voltage
sequencing insures that LDO1 output (1.8V supply) is
always stabilized before LDO2 is turned on. When powering
down, power to the LDO2 is removed before the LDO1
output goes off. The ISL6411 also integrates RESET
function, which eliminates the need for additional RESET IC
required in WLAN applications. The IC asserts a RESET
signal whenever the VIN supply voltage drops below a
preset threshold, keeping it asserted for at least 25ms after
Vin has risen above the reset threshold. An output fault
detection circuit indicates loss of regulation on any of the
three outputs. Other features include an over current
protection, thermal shutdown and reverse battery protection.
Features
• Small DC/DC Converter Size
- Three LDOs and RESET Circuitry in a Low-Profile
4x4mm QFN Package
• High Output Current
- LDO1, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
- LDO2, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
- LDO3, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
• Ultra-Low Dropout Voltage
- LDO2, 2.84V. . . . . . . . . . . . . . . 125mV (typ.) at 300mA
- LDO3, 2.84V. . . . . . . . . . . . . . . 100mV (typ.) at 200mA
• Ultra-Low Output Voltage Noise
- <30V
RMS
(typ.) for LDO3 (VCO Supply)
• Stable with Smaller Ceramic Output Capacitors
• Voltage Sequencing for BBP/MAC and Analog Supplies
• Extensive Protection and Monitoring Features
- Over current protection
- Short circuit protection
- Thermal shutdown
- Reverse battery protection
- FAULT indicator
• Logic-Controlled Dual Shutdown Pins
• Integrated Microprocessor Reset Circuit
- Programmable Reset Delay
- Complimentary Reset Outputs
• Proven Reference Design for Total WLAN System
Solution
• QFN Package Option
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint Improves PCB
Efficiency and Is Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART NUMBER
ISL6411IR
ISL6411IRZ (Note)
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
PACKAGE
16 Ld QFN
16 Ld QFN
PKG. DWG.
#
L16.4x4
L16.4x4
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Applications
• PRISM® 3, PRISM GT™, and PRISM WWR Chipsets
• WLAN Cards
- PCMCIA, Cardbus32, MiniPCI Cards
- Compact Flash Cards
• Hand-Held Instruments
FN9081 Rev 2.00
Nov 24, 2003
Page 1 of 12
ISL6411
Absolute Maximum Ratings
(Note 1)
V
IN
, SHDN/SHDN3 to GND/GND3 . . . . . . . . . . . . . . . -7.0V to 7.0V
SET, CC, FAULT to GND/GND3 . . . . . . . . . . . . . . . . . -0.3V to 7.0V
Output Current (Continuous)
LDO1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
LDO2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
LDO3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance (Typical, Notes 2, 3)
JA
(°C/W)
JC
(°C/W)
QFN Package. . . . . . . . . . . . . . . . . . . .
46
7.5
Maximum Junction Temperature (Plastic Package) . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. All voltages are with respect to GND.
2.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
PARAMETER
GENERAL SPECIFICATIONS
V
IN
Voltage Range
Operating Supply Current
Shutdown Supply Current
SHDN/SHDN3 Input Threshold
V
IN
= +3.3V, Compensation Capacitor = 33nF, T
A
= 25°C, Unless Otherwise Noted.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
3.0
IOUT = 0mA
SHDN/SHDN3 = GND
VIH, VIN = 3V to 3.6V
VIL, VIN = 3V to 3.6V
-
-
2.0
-
-
145
-
C
OUT
= 10F, V
OUT
= 90% of final
value
Rising 75mV Hysteresis
-
2.2
3.3
600
5
-
-
-
150
20
120
2.45
3.6
850
10
-
0.4
0.25
160
-
-
2.65
V
A
A
V
V
V
°C
°C
s
V
FAULT Output Low Voltage
Thermal Shutdown Temperature (Note 7)
Thermal Shutdown Hysteresis
Start-up Time
Input Undervoltage Lockout (Note 7)
LDO1 SPECIFICATIONS
Output Voltage (V
OUT1
)
Output Voltage Accuracy
Line Regulation
Load Regulation
Maximum Output Current (I
OUT1
) (Note 7)
Output Current Limit (Note 7)
Output Voltage Noise
LDO2 SPECIFICATIONS
Output Voltage (V
OUT2
)
Output Voltage Accuracy
Maximum Output Current (I
OUT2
) (Note 7)
Output Current Limit (Note 7)
Dropout Voltage (Note 5)
Line Regulation
I
SINK
= 2mA
-
I
OUT
= 10mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
I
OUT
= 10mA to 500mA
-1.5
-0.15
-1.5
500
0.55
10Hz < f < 100kHz, C
OUT
= 4.7F,
I
OUT
= 50mA
-
1.8
-
0.0
-
-
0.6
115
-
1.5
0.15
1.5
-
1.0
-
V
%
%/V
%
mA
A
V
RMS
-
I
OUT
= 10mA
VIN = 3.6V
-1.5
300
330
I
OUT
= 300mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
-
-0.15
2.84
-
-
770
125
0.0
-
1.5
-
-
220
0.15
V
%
mA
mA
mV
%/V
FN9081 Rev 2.00
Nov 24, 2003
Page 4 of 12
ISL6411
Electrical Specifications
PARAMETER
Load Regulation
Output Voltage Noise
V
IN
= +3.3V, Compensation Capacitor = 33nF, T
A
= 25°C, Unless Otherwise Noted.
(Continued)
TEST CONDITIONS
I
OUT
= 10mA to 300mA
10Hz < f < 100kHz, I
OUT
= 10mA
C
OUT
= 2.2F
C
OUT
= 10F
LDO3 SPECIFICATIONS
Output Voltage (V
OUT3
)
Output Voltage Accuracy
Maximum Output Current (I
OUT3
) (Note 7)
Output Current Limit (Note 7)
Dropout Voltage (Note 5)
Line Regulation
Load Regulation
Output Voltage Noise
I
OUT
= 200mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
I
OUT
= 10mA to 200mA
10Hz < f < 100kHz, I
OUT
= 10mA
C
OUT
= 2.2F
C
OUT
= 10F
RESET BLOCK SPECIFICATIONS
RESET Threshold
RESET Threshold Hysteresis (Note 7)
V
IN
to RESET Delay
RESET/RESET Active Timeout Period (Notes 6, 7)
NOTES:
4. Specifications at -40°C are guaranteed by design/characterization, not production tested.
5. The dropout voltage is defined as V
IN
- V
OUT
, when V
OUT
is 50mV below the value of V
OUT
for V
IN
= V
OUT
+ 0.5V.
6. The RESET time is linear with CT at a slope of 2.5ms/nF. Thus, at 10nF (0.01F) the RESET time is 25ms; at 100nF (0.1F) the RESET time
would be 250ms.
7. Guaranteed by design, not production tested.
VCC = V
TH
to V
TH
- 100mV
2.564
6.3
-
25
2.630
-
20
-
2.696
-
-
-
V
mV
s
ms
-
-
30
20
-
-
V
RMS
V
RMS
I
OUT
= 10mA
VIN = 3.6V
-
-1.5
200
250
-
-0.15
-
2.84
-
-
400
100
0.0
0.2
-
1.5
-
-
200
0.15
1.0
V
%
mA
mA
mV
%/V
%
-
-
65
60
-
-
V
RMS
V
RMS
MIN
-
TYP
0.2
MAX
1.0
UNITS
%
Typical Performance Curves
0.140
0.120
0.100
V
D
(V)
0.080
0.060
0.040
0.020
0.000
0.00
0.05
0.10
0.15
0.20
I
O
(Amps)
0.25
0.30
V
D
(V)
0.100
0.090
0.080
0.070
0.060
0.050
0.040
0.030
0.020
0.010
0.000
0.00
0.05
0.10
I
O
(Amps)
0.15
0.30
FIGURE 1. LD02 DROPOUT VOLTAGE
FIGURE 2. LD03 DROPOUT VOLTAGE
FN9081 Rev 2.00
Nov 24, 2003
Page 5 of 12
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