MM74HC688 8-Bit Magnitude Comparator (Equality Detector)
September 1983
Revised May 2005
MM74HC688
8-Bit Magnitude Comparator (Equality Detector)
General Description
The MM74HC688 equality detector utilizes advanced sili-
con-gate CMOS technology to compare bit for bit two 8-bit
words and indicates whether or not they are equal. The
P Q output indicates equality when it is LOW. A single
active low enable is provided to facilitate cascading of sev-
eral packages and enable comparison of words greater
than 8 bits.
This device is useful in memory block decoding applica-
tions, where memory block enable signals must be gener-
ated from computer address information.
The comparator’s output can drive 10 low power Schottky
equivalent loads. This comparator is functionally and pin
compatible to the 74LS688. All inputs are protected from
damage due to static discharge by diodes to V
CC
and
ground.
Features
s
Typical propagation delay: 20 ns
s
Wide power supply range: 2–6V
s
Low quiescent current: 80
P
A (74 Series)
s
Large output current: 4 mA (74 Series)
s
Same as HC521
Ordering Code:
Order Number
MM74HC688WM
MM74HC688SJ
MM74HC688MTC
MM74HC688N
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP
Logic Diagram
Top View
Truth Table
Inputs
Data
P,Q
P
Q
P
!
Q
P
Q
X
Enable
G
L
L
L
H
P
L
H
H
H
Q
© 2005 Fairchild Semiconductor Corporation
DS005018
www.fairchildsemi.com
MM74HC688
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
q
C
600 mW
500 mW
(I
CC
)
Storage Temperature Range (T
STG
)
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
) V
CC
V
CC
V
CC
2.0V
4.5V
6.0V
1000
500
400
ns
ns
ns
2
0
Max
6
V
CC
Units
V
V
0.5 to
7.0V
1.5 to V
CC
1.5V
0.5 to V
CC
0.5V
r
20 mA
r
25 mA
r
50 mA
65
q
C to
150
q
C
40
85
q
C
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
12 mW/
q
C from 65
q
C to 85
q
C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
IN
V
IH
or V
IL
Conditions
(Note 4)
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
Typ
1.5
3.15
4.2
0.5
1.35
1.8
2.0
4.5
6.0
4.2
5.7
0
0
0
0.2
0.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
25
q
C
T
A
40 to 85
q
C T
A
55 to 125
q
C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
|I
OUT
|
d
20
P
A
2.0V
4.5V
6.0V
V
IN
V
IH
or V
IL
4.5V
6.0V
2.0V
4.5V
6.0V
|I
OUT
|
d
4.0 mA
|I
OUT
|
d
5.2 mA
V
OL
Maximum LOW Level
Output Voltage
V
IN
V
IH
or V
IL
|I
OUT
|
d
20
P
A
V
IN
V
IH
or V
IL
4.5V
6.0V
6.0V
6.0V
|I
OUT
|
d
4.0 mA
|I
OUT
|
d
5.2 mA
I
IN
I
CC
Maximum Input
Current
Maximum Quiescent
Supply Current
V
IN
I
OUT
V
CC
or GND
0
P
A
V
IN
V
CC
or GND
r
0.1
8.0
r
1.0
80
r
1.0
160
P
A
P
A
Note 4:
For a power supply of 5V
r
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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2
MM74HC688
AC Electrical Characteristics
V
CC
5V, T
A
25
q
C, C
L
15 pF, t
r
Parameter
t
f
6 ns
Conditions
Typ
21
14
Guaranteed
Limit
30
20
Units
ns
ns
Symbol
t
PHL
, t
PLH
t
PLH
, t
PHL
Maximum Propagation
Delay, any P or Q to Output
Maximum Propagation
Delay, Enable to any Output
AC Electrical Characteristics
V
CC
2.0V to 6.0V, C
L
50 pF, t
r
t
f
6 ns (unless otherwise specified)
Conditions
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
25
q
C
Typ
60
22
19
45
15
13
30
8
7
45
5
10
10
10
175
35
30
120
24
20
75
15
13
T
A
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation
Delay, P or Q to
Output
40 to 85
q
C T
A
55 to 125
q
C
Guaranteed Limits
220
44
38
150
30
25
95
19
16
263
53
45
180
36
30
110
22
19
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
t
PHL
, t
PLH
Maximum Propagation
Delay, Enable to
Output
t
THL
, t
TLH
Maximum Output Rise
and Fall Time
C
PD
C
IN
Power Dissipation
Capacitance (Note 5)
Maximum Input
Capacitance
Note 5:
C
PD
determines the no load dynamic power consumption, P
D
I
S
C
PD
V
CC
f
I
CC
.
C
PD
V
CC2
f
I
CC
V
CC
, and the no load dynamic current consumption,
3
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MM74HC688
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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4
MM74HC688
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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