LTC4300A-1/LTC4300A-2
Hot Swappable
2-Wire Bus Buffers
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
s
s
s
s
Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
Isolates Input SDA and SCL Lines from Output
Compatible with I
2
C
TM
, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
Small MSOP 8-Pin Package
Low I
CC
Chip Disable: <1µA (LTC4300A-1)
READY Open Drain Output (LTC4300A-1)
1V Precharge on all SDA and SCL Lines
Supports Clock Stretching, Arbitration and
Synchronization
5V to 3.3V Level Translation (LTC4300A-2)
High Impedance SDA, SCL Pins for V
CC
= 0V
The LTC
®
4300A series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without
corruption of the data and clock busses. When the con-
nection is made, the LTC4300A-1/LTC4300A-2 provide
bidirectional buffering, keeping the backplane and card
capacitances isolated. Rise-time accelerator circuitry*
allows the use of weaker DC pull-up currents while still
meeting rise-time requirements. During insertion, the
SDA and SCL lines are precharged to 1V to minimize bus
disturbances.
The LTC4300A-1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
mode when driven to ground and sets normal operation when
driven to V
CC
. It also includes an open drain READY output
pin, which indicates that the backplane and card sides are
connected together. The LTC4300A-2 replaces the ENABLE
pin with a dedicated supply voltage pin, V
CC2
, for the card
side, providing level shifting between 3.3V and 5V systems.
Both the backplane and card may be powered with supply
voltages ranging from 2.7V to 5.5V, with no contraints on
which supply voltage is higher. The LTC4300A-2 also re-
places the READY pin with a digital CMOS input pin, ACC,
which enables and disables the rise-time accelerator currents.
The LTC4300A is available in a small 8-pin MSOP package.
APPLICATIO S
s
s
s
s
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computer
, LTC and LT are registered trademarks of Linear Technology Corporation.
I
2
C is a trademark of Philips Electronics N. V.
*U.S. Patent No. 6,650,174
TYPICAL APPLICATIO
V
CC
3.3V
R1
10k
SCLIN
R2
10k
3
8
C1
0.01µF
Input–Output Connection t
PLH
R3
10k
2
R4
10k
SCLOUT
OUTPUT
SIDE
50pF
INPUT
SIDE
150pF
SDAIN
6
7
SDAOUT
1
LTC4300A-1
5
READY
ENABLE
GND
4
4300A-1/2
TA01
U
4300A TA02
U
U
sn4300a12 4300a12fs
1
LTC4300A-1/LTC4300A-2
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
ENABLE/V
CC2
*
SCLOUT
SCLIN
GND
1
2
3
4
8
7
6
5
V
CC
SDAOUT
SDAIN
READY/ACC*
V
CC
to GND .................................................... – 0.3 to 7V
V
CC2
to GND (LTC4300A-2) ........................... – 0.3 to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT ................. – 0.3 to 7V
READY, ENABLE (LTC4300A-1) .................... – 0.3 to 7V
ACC (LTC4300A-2) ........................................ – 0.3 to 7V
Operating Temperature Range
LTC4300A-1C/LTC4300A-2C ................... 0°C to 70°C
LTC4300A-1I/LTC4300A-2I ................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
LTC4300A-1CMS8
LTC4300A-1IMS8
LTC4300A-2CMS8
LTC4300A-2IMS8
MS8
PART MARKING
LTABF
LTABG
LTACF
LTACG
MS8 PACKAGE
8-LEAD PLASTIC MSOP
*LTC4300A-2
T
JMAX
= 125°C,
θ
JA
= 200°C/W
Consult LTC marketing for parts specified with wider operating temperature ranges.
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specfications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, unless otherwise noted.
SYMBOL PARAMETER
Power Supply
V
CC
I
CC
I
SD
V
CC2
I
VCC1
I
VCC2
Positive Supply Voltage
Supply Current
Supply Current in Shutdown Mode
Card Side Supply Voltage
V
CC
Supply Current
V
CC2
Supply Current
V
CC
= 5.5V, V
SDAIN
= V
SCLIN
= 0V, LTC4300A-1
V
ENABLE
= 0V, LTC4300A-1
LTC4300A-2
V
SDAIN
= V
SCLIN
= 0V, V
CC1
= V
CC2
= 5.5V,
LTC4300A-2
V
SDAOUT
= V
SCLOUT
= 0V, V
CC1
= V
CC2
= 5.5V,
LTC4300A-2
SDA, SCL Floating
LTC4300A-1
LTC4300A-1, ENABLE Pin
ENABLE from 0V to V
CC
, LTC4300A-1
LTC4300A-1
LTC4300A-1
LTC4300A-1
LTC4300A-1
LTC4300A-1
I
PULLUP
= 3mA, LTC4300A-1
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
2.7
TYP
MAX
5.5
UNITS
V
mA
µA
V
mA
mA
5.1
0.1
2.7
3
2.1
7
5.5
4.1
2.9
Start-Up Circuitry
V
PRE
t
IDLE
V
EN
V
DIS
I
EN
t
PHL
t
PLH
I
OFF
V
OL
Precharge Voltage
Bus Idle Time
ENABLE Threshold Voltage
Disable Threshold Voltage
ENABLE Input Current
ENABLE Delay, On-Off
READY Delay, Off-On
ENABLE Delay, Off-On
READY Delay, On-Off
READY OFF State Leakage Current
READY Output Low Voltage
0.8
50
0.1 • V
CC
1.0
95
0.5 • V
CC
0.5 • V
CC
±0.1
10
10
95
10
±0.1
0.4
±1
1.2
150
0.9 • V
CC
V
µs
V
V
µA
ns
ns
µs
ns
µA
V
sn4300a12 4300a12fs
2
U
W
U
U
W W
W
LTC4300A-1/LTC4300A-2
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Rise-Time Accelerators
I
PULLUPAC
Transient Boosted Pull-Up Current
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specfications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, unless otherwise noted.
CONDITIONS
Positive Transition on SDA,SCL, V
CC
= 2.7V,
Slew Rate = 1.25V/µs (Note 2),
LTC4300A-2, ACC = 0.7 • V
CC2
, V
CC2
= 2.7V
LTC4300A-2
LTC4300A-2
LTC4300A-2
LTC4300A-2
10k to V
CC
on SDA, SCL, V
CC
= 3.3V (Note 3),
LTC4300A-2, V
CC2
= 3.3V, V
IN
= 0.2V
Guaranteed by Design, Not Subject to Test
Guaranteed by Design, Not Subject to Test
SDA, SCL Pins, I
SINK
= 3mA, V
CC
= 2.7V,
V
CC2
= 2.7V, LTC4300A-2
SDA, SCL Pins = V
CC
= 5.5V,
LTC4300A-2, V
CC2
= 5.5V
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Notes 4, 5)
(Notes 4, 5)
0
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20 + 0.1 • C
B
20 + 0.1 • C
B
Note 4:
Guaranteed by design, not subject to test.
Note 5:
C
B
= total capacitance of one bus line in pF.
300
300
q
q
MIN
1
TYP
2
MAX
UNITS
mA
V
ACCDIS
V
ACCEN
I
VACC
t
PDOFF
V
OS
f
SCL, SDA
C
IN
V
OL
I
LEAK
Accelerator Disable Threshold
Accelerator Enable Threshold
ACC Input Current
ACC Delay, On/Off
Input-Output Offset Voltage
Operating Frequency
Digital Input Capacitance
Output Low Voltage, Input = 0V
Input Leakage Current
0.3 • V
CC2
0.5 • V
CC2
0.5 • V
CC2
±0.1
5
0.7 • V
CC2
±1
V
V
µA
ns
175
400
10
0.4
±5
mV
kHz
pF
V
µA
Input-Output Connection
0
0
0
100
Timing Characteristics
f
I2C
t
BUF
t
hD,STA
t
su,STA
t
su,STO
t
hD, DAT
t
su, DAT
t
LOW
t
HIGH
t
f
t
r
I
2
C Operating Frequency
Bus Free Time Between Stop
and Start Condition
Hold Time After (Repeated)
Start Condition
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
Clock, Data Fall Time
Clock, Data Rise Time
400
kHz
µs
µs
µs
µs
ns
ns
µs
µs
ns
ns
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired
Note 2:
I
PULLUPAC
varies with temperature and V
CC
voltage, as shown in
the Typical Performance Characteristics section.
Note 3:
The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pullup resistor and V
CC
voltage is shown in the Typical Performance
Characteristics section.
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LTC4300A-1/LTC4300A-2
TYPICAL PERFOR A CE CHARACTERISTICS
I
CC
vs Temperature (LTC4300A-1)
5.3
5.2
5.1
5.0
t
PHL
(ns)
V
CC
= 5.5V
80
I
CC
(mA)
4.9
4.8
4.7
4.6
4.5
4.4
4.3
–40
25
TEMPERATURE (°C)
85
4300-1/2 G01
V
CC
= 2.7V
I
PULLUPAC
vs Temperature
12
10
I
PULLUPAC
(mA)
8
6
4
2
V
CC
= 2.7V
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
0
V
CC
= 3V
V
CC
= 5V
V
OUT
– V
IN
(mV)
4
U W
Input – Output t
PHL
vs Temperature
(LTC4300A-1)
100
V
CC
= 2.7V
V
CC
= 3.3V
60
40
V
CC
= 5.5V
20
C
IN
= C
OUT
= 100pF
R
PULLUPIN
= R
PULLUPOUT
= 10k
–25
0
25
50
TEMPERATURE (°C)
75
100
0
–50
4300-1/2 G02
Connection Circuitry V
OUT
– V
IN
300
250
200
150
V
CC
= 5V
100
V
CC
= 3.3V
50
T
A
= 25°C
V
IN
= 0V
0
10,000
20,000
30,000
R
PULLUP
(Ω)
40,000
4300-1/2 G04
4300-1/2 G03
sn4300a12 4300a12fs
LTC4300A-1/LTC4300A-2
PI FU CTIO S
ENABLE/V
CC2
(Pin 1):
Chip Enable Pin/Card Supply Volt-
age. For the LTC4300A-1, this is a digital CMOS threshold
input pin. Grounding this pin puts the part in a low current
(<1µA) mode. It also disables the rise-time accelerators,
disables the bus precharge circuitry, drives READY low,
isolates SDAIN from SDAOUT and isolates SCLIN from
SCLOUT. Drive ENABLE all the way to V
CC
for normal
operation. Connect ENABLE to V
CC
if this feature is not
being used. For the LTC4300A-2, this is the supply voltage
for the devices on the card I
2
C busses. Connect pull-up
resistors from SDAOUT and SCLOUT to this pin. Place a
bypass capacitor of at least 0.01µF close to this pin for best
results.
SCLOUT (Pin 2):
Serial Clock Output. Connect this pin to
the SCL bus on the card.
SCLIN (Pin 3):
Serial Clock Input. Connect this pin to the
SCL bus on the backplane.
GND (Pin 4):
Ground. Connect this pin to a ground plane
for best results.
READY/ACC (Pin 5):
Connection Flag/Rise-Time Accel-
erator Control. For the LTC4300A-1, this is an open-drain
NMOS output which pulls low when either ENABLE is low
or the start-up sequence described in the Operation sec-
tion has not been completed. READY goes high when
ENABLE is high and start-up is complete. Connect a 10k
resistor from this pin to V
CC
to provide the pull up. For the
LTC4300A-2, this is a CMOS threshold digital input pin
that enables and disables the rise-time accelerators on all
four SDA and SCL pins. Drive ACC all the way to the V
CC2
supply voltage to enable all four accelerators; drive ACC to
ground to turn them off.
SDAIN (Pin 6):
Serial Data Input. Connect this pin to the
SDA bus on the backplane.
SDAOUT (Pin 7):
Serial Data Output. Connect this pin to
the SDA bus on the card.
V
CC
(Pin 8):
Main Input Power Supply from Backplane.
This is the supply voltage for the devices on the backplane
I
2
C busses. Connect pull-up resistors from SDAIN and
SCLIN (and also from SDAOUT and SCLOUT for the
LTC4300A-1) to this pin. Place a bypass capacitor of at
least 0.01µF close to this pin for best results.
U
U
U
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