• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
3.
3
m
m
1
Top View
3.
m
3
m
4
G
Bottom View
3
S
2
S
1
S
APPLICATIONS
• Synchronous rectification
• High power density DC/DC
• VRMs and embedded DC/DC
• Synchronous buck converter
• Load switching
D
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
max. (Ω) at V
GS
= 10 V
R
DS(on)
max. (Ω) at V
GS
= 4.5 V
Q
g
typ. (nC)
I
D
(A)
Configuration
30
0.00210
0.00286
21
40
Single
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK 1212-8S
SiSS64DN-T1-GE3
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
T
C
= 25 °C
T
C
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
T
C
= 25 °C
T
A
= 25 °C
L = 0.1 mH
T
C
= 25 °C
T
C
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
I
S
I
AS
E
AS
P
D
T
J
, T
stg
LIMIT
30
+20, -16
40
g
40
g
37
b, c
29.8
b, c
100
40
g
4
b, c
30
45
57
36
4.8
b, c
3
b, c
-55 to +150
260
UNIT
V
Continuous drain current (T
J
= 150 °C)
Pulsed drain current (t = 100 μs)
Continuous source-drain diode current
Single pulse avalanche current
Single pulse avalanche energy
A
mJ
Maximum power dissipation
W
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
d, e
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
b, f
t
≤
10 s
R
thJA
21
26
Maximum junction-to-ambient
°C/W
Maximum junction-to-case (drain)
Steady state
R
thJC
1.7
2.2
Notes
a. Based on T
C
= 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8S is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 70 °C/W
g. Package limited
S17-0779-Rev. A, 22-May-17
Document Number: 67294
1
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiSS64DN
www.vishay.com
Vishay Siliconix
SYMBOL
V
DS
ΔV
DS
/T
J
ΔV
GS(th)
/T
J
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
V
DS
= 15 V, V
GS
= 0 V, f = 1 MHz
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA
V
DS
= V
GS
, I
D
= 250 μA
V
DS
= 0 V, V
GS
= +20 V, -16 V
V
DS
= 30 V, V
GS
= 0 V
V= 30 V, V
DS GS
= 0 V, T
J
= 55 °C
V
DS
≥
5 V, V
GS
= 10 V
V
GS
= 10 V, I
D
= 10 A
V
GS
= 4.5 V, I
D
= 10 A
V
DS
= 10 V, I
D
= 10 A
MIN.
30
-
-
1.1
-
-
-
40
-
-
-
-
-
-
-
Q
g
Q
gs
Q
gd
Q
oss
R
g
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
I
S
I
SM
V
SD
t
rr
Q
rr
t
a
t
b
I
F
= 10 A, di/dt = 100 A/μs,
T
J
= 25 °C
I
S
= 10 A
T
C
= 25 °C
V
DD
= 15 V, R
L
= 1.5
Ω
I
D
≅
10 A, V
GEN
= 4.5 V, R
g
= 1
Ω
V
DD
= 15 V, R
L
= 1.5
Ω
I
D
≅
10 A, V
GEN
= 10 V, R
g
= 1
Ω
V
DS
= 15 V, V
GS
= 0 V
f = 1 MHz
V = 15 V, V
GS
= 10 V, I
D
= 10 A
V
DS
= 15 V, V
GS
= 4.5 V, I
D
= 10 A
-
-
-
-
-
0.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP.
-
18
-6.2
-
-
-
-
-
MAX.
-
-
-
2.2
± 100
1
10
-
UNIT
V
mV/°C
V
nA
μA
A
Ω
S
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-source breakdown voltage
V
DS
temperature coefficient
V
GS(th)
temperature coefficient
Gate-source threshold voltage
Gate-source leakage
Zero gate voltage drain current
On-state drain current
a
Drain-source on-state resistance
a
Forward transconductance
a
Dynamic
b
Input capacitance
Output capacitance
Reverse transfer capacitance
C
rss
/C
iss
ratio
Total gate charge
Gate-source charge
Gate-drain charge
Output charge
Gate resistance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulse diode forward current (t = 100 μs)
Body diode voltage
Body diode reverse recovery time
Body diode reverse recovery charge
Reverse recovery Fall time
Reverse recovery Rise time
-
-
0.73
40
34
20
20
40
100
1.2
80
70
-
-
A
V
ns
nC
ns
3420
1100
81
0.024
45
21
10.5
2.7
37
0.8
13
15
25
10
24
45
30
15
-
-
-
0.048
68
32
-
-
-
1.6
25
30
50
20
48
70
60
30
ns
Ω
nC
pF
0.00180 0.00210
0.00220 0.00286
70
-
Notes
a. Pulse test; pulse width
≤
300 μs, duty cycle
≤
2 %
b. Guaranteed by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S17-0779-Rev. A, 22-May-17
Document Number: 67294
2
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiSS64DN
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
V
GS
= 10 V thru 4 V
80
I
D
- Drain Current (A)
I
D
- Drain Current (A)
16
T
C
= 25
°C
12
20
Vishay Siliconix
60
40
V
GS
= 3 V
20
8
T
C
= 125
°C
4
T
C
= - 55
°C
0
0.0
0.5
1.0
1.5
2.0
V
DS
- Drain-to-Source Voltage (V)
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
V
GS
-
Gate-to-Source
Voltage (V)
3.5
Output Characteristics
Transfer Characteristics
0.0030
5000
4000
R
DS(on)
- On-Resistance (Ω)
0.0025
C - Capacitance (pF)
V
GS
= 4.5 V
3000
C
iss
0.0020
2000
C
oss
1000
0.0015
V
GS
= 10 V
C
rss
0.0010
0
0
20
40
60
80
100
0
5
I
D
- Drain Current (A)
10
15
20
25
V
DS
- Drain-to-Source Voltage (V)
30
On-Resistance vs. Drain Current
Capacitance
10
1.8
R
DS(on)
- On-Resistance (Normalized)
V
GS
-
Gate-to-Source
Voltage (V)
8
I
D
= 10 A
V
DS
= 7.5 V
1.6
I
D
= 10 A
V
GS
= 10 V
1.4
V
GS
= 4.5 V
6
V
DS
= 15 V
4
V
DS
= 24 V
1.2
1.0
2
0.8
0
0
10
20
30
40
50
Q
g
- Total
Gate
Charge (nC)
0.6
- 50
- 25
0
25
50
75
100
125
150
T
J
- Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
S17-0779-Rev. A, 22-May-17
Document Number: 67294
3
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiSS64DN
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
Vishay Siliconix
0.008
I
D
= 10 A
R
DS(on)
- On-Resistance (Ω)
T
J
= 150
°C
I
S
-
Source
Current (A)
0.006
10
0.004
T
J
= 125
°C
0.002
T
J
= 25
°C
1
T
J
= 25
°C
0.1
0.0
0.2
0.4
0.6
0.8
1.0
V
SD
-
Source-to-Drain
Voltage (V)
1.2
0.000
0
2
4
6
8
V
GS
-
Gate-to-Source
Voltage (V)
10
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2.0
1.8
100
80
1.6
1.4
1.2
1.0
I
D
= 250 μA
Power (W)
75
100
125
150
V
GS(th)
(V)
60
40
20
0.8
0.6
- 50
- 25
0
25
50
0
0.001
0.01
0.1
1
Time (s)
10
100
1000
T
J
- Temperature (°C)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
1000
Limited by R
DS(on)
*
100
I
DM
Limited
I
on
Limited
I
D
- Drain Current (A)
10
100 μs
1 ms
1
10 ms
100 ms
1
s
10
s
DC
BVDSS Limited
0.1
T
A
= 25
°C
0.01
0.01
0.1
1
10
100
V
DS
- Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
Safe Operating Area
S17-0779-Rev. A, 22-May-17
Document Number: 67294
4
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiSS64DN
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
150
80
Vishay Siliconix
120
60
I
D
- Drain Current (A)
Power (W)
Package Limited
90
40
60
20
30
0
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
0
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
Current Derating
a
Power, Junction-to-Case
Note
a. The power dissipation P
D
is based on T
J
max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit
S17-0779-Rev. A, 22-May-17
Document Number: 67294
5
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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