ASAHI KASEI
[AKD5359-B]
AKD5359-B
AK5359 Evaluation Board Rev.0
GENERAL DESCRIPTION
AKD5359-B is an evaluation board for the digital audio 24bit 96kHz A/D converter, AK5359. AKD5359-B
has analog input circuits and a digital interface transmitter,and can achieve the interface with digital audio
systems via opt-connector.
Ordering guide
AKD5359-B
---
AK5359 Evaluation Board
FUNCTION
•
DIT (AK4114) with optical output
VA,VD
AGND,DGND
LIN
RIN
AK5359
AK4114
(DIT)
Opt
Out
DSP Data
10pin Header
Figure 1 AKD5359-B Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
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[AKD5359-B]
1. Evaluation Board Manual
Operation sequence
1) Set up the power supply lines.
[VA]
(red)
= 2.7
∼
5.5V or +15V
[VD]
(orange)
= 2.7
∼
5.5V
[VCC]
(red)
= 3.3V
[AGND] (black)
= 0V
[DGND] (black)
= 0V
: for VA of AK5359 (typ. 5.0V)
: for VD of AK5359, 74HC14 (typ. 5.0V)
: for AK4114
: for analog ground
: for logic ground
Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins and DIP switches.
(See the followings.)
3) Power on.
The AK5359 and AK4114 should be reset once bringing SW2 = “L” upon power-up.
Evaluation mode
(1) Slave Mode
(1-1) A/D evaluation using DIT function of AK4114
PORT2 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through
optical connector (TOTX141). It is possible to connect AKM’s D/A converter evaluation boards on the
digital-amplifier, which equips DIR input. Nothing should be connected to PORT1 (DSP).
JP5
MCLK
(1-2) All interface signals including master clock are fed externally.
PORT1 (DSP) is used. All interface signals (MCLK, SCLK, LRCK) are provided to the AK5359 through
PORT1. JP5 (MCLK) should be open. The DIF1 of SW1 (MODE) should be set to “H”.
JP5
MCLK
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ASAHI KASEI
[AKD5359-B]
(2) Master Mode
(2-1) A/D evaluation using DIT function of AK4114
PORT2 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through
optical connector (TOTX141). It is possible to connect AKM’s D/A converter evaluation boards on the
digital-amplifier, which equips DIR input. Nothing should be connected to PORT1 (DSP). The DIF1 of SW1
(MODE) should be set to “H”.
JP5
MCLK
(2-2) Master clock is fed externally.
PORT1 (DSP) is used. MCLK is provided to the AK5359 through PORT1. JP5 (MCLK) should be open. The
DIF1 of SW1 (MODE) should be set to “H”.
JP5
MCLK
Other jumper pins set up
1. JP1 (GND) : Analog ground and Digital ground
OPEN : Separated.
SHORT : Common. (The connector “DGND” can be open.) <Default>
2. JP2 (CKS1) : Setting of CKS1 pin for AK5359
H : Master mode
L : Slave mode <Default>
3. JP3 (VA) : Select VA for AK5359
VA : Supply from VA connector
REG : Supply from regulator. VA connector should be supplied +15V. <Default>
4. JP4 (VD) : Select VD for AK5359
VA : Supply from VA connector
VD : Supply from VD connector <Default>
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[AKD5359-B]
DIP Switch set up
[SW1] (MODE1): Setting the evaluation mode for AK5359 and AK4114
ON is “H”, OFF is “L”. CKS1 should be set by JP2.
No.
1
2
3
4
Name
CKS0
CKS2
DIF
DIF1
OFF (“L”)
See Table 2
MSB justified
AK4114 Master mode
Table 1. Mode Setting
Master/Slave
Slave
ON (“H”)
I
2
S Compatible
AK4114 Slave mode
CKS2
L
CKS1
L
CKS0
L
HPF
ON
L
L
L
H
H
H
H
L
H
H
L
L
H
H
H
L
H
L
H
L
H
OFF
ON
ON
ON
ON
ON
ON
Slave
Master
Master
Master
Master
Master
Master
MCLK
128/192fs (108k<fs≤216k)
256/384fs (8k≤fs≤108k)
512/768fs (8k≤fs≤54k)
128/192fs (108k<fs≤216k)
256/384fs (8k≤fs≤108k)
512/768fs (8k≤fs≤54k)
256fs (8k≤fs≤108k)
512fs (8k≤fs≤54k)
128fs (108k<fs≤216k)
SCLK
≥
48fs or 32fs
≥
48fs or 32fs
64fs
64fs
64fs
64fs
64fs
64fs
192fs (108k<fs≤216k)
384fs (8k≤fs≤108k)
768fs (8k≤fs≤54k)
Table 2. Mode Setting of AK5359
Note: AK4114 does not support MCLK=384fs/512fs/768fs.
PORT1 (DSP) should be used when MCLK=384fs/512fs/768fs.
The function of the toggle SW
Upper-side is “H” and lower-side is “L”.
[SW2] (PDN): Resets the AK5359 and AK4114. Keep “H” during normal operation.
<KM079700>
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ASAHI KASEI
[AKD5359-B]
Analog Input Circuits
Analog signal is input via J1(RIN) and J2(LIN) of RCA connectors.
J1
RIN
C1
10u
AINR
+
J2
LIN
C2
10u
AINL
+
Figure 2 Analog Input circuits
* AKM assumes no responsibility for the trouble when using the circuit examples.
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