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SG-8503CA 100.0M 125.0M-APRLZ0

产品描述OSC XO 125MHZ LVPECL SMD
产品类别无源元件   
文件大小829KB,共5页
制造商EPSON
官网地址http://www.epsondevice.com
标准
下载文档 详细参数 全文预览

SG-8503CA 100.0M 125.0M-APRLZ0概述

OSC XO 125MHZ LVPECL SMD

SG-8503CA 100.0M 125.0M-APRLZ0规格参数

参数名称属性值
类型XO(标准)
频率 - 输出 1100MHz
频率 - 输出 2125MHz
功能启用/禁用
输出LVPECL
电压 - 电源2.5 V ~ 3.3 V
频率稳定度±50ppm
工作温度-40°C ~ 85°C
电流 - 电源(最大值)90mA
大小/尺寸0.276" 长 x 0.197" 宽(7.00mm x 5.00mm)
高度0.059"(1.50mm)
封装/外壳6-SMD,无引线
电流 - 电源(禁用)(最大值)40mA

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Crystal oscillator
Dual or Quad Selectable Programmable Crystal Oscillator
Product Number (please contact us)
Output: LV-PECL
SG-8503CA : X1G005011xxxx00
SG-8504CA : X1G005021xxxx00
SG-8503CA / SG-8504CA
Dual frequency Selectable: SG-8503CA, 7.0 × 5.0 × 1.5 mm (6 pins)
Quad frequency Selectable: SG-8504CA, 7.0 × 5.0 × 1.5 mm (8 pins)
Frequency range:
50 MHz to 800 MHz
Supply voltage:
2.5 V to 3.3 V
Features
User-specified two
(FSEL)
or four
(FSEL0, FSEL1)
startup frequencies
High frequency fundamental tone crystal, Low jitter PLL technology
Actual size
Available field oscillator programmer “SG-Writer ǁ”
Application
OTN, BTS, Test Instrument
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature
Frequency tolerance *1
Current consumption
Disable current
Symmetry
Output voltage
Output load condition
Input voltage
Rise time / Fall time
Start-up time
Setting time for frequency change
Symbol
f
0
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
L_ECL
V
IH
V
IL
t
r
/t
f
t_str
t
SET1
Specifications
50 MHz to 800 MHz
2.5 V - 0.125 V to 3.3 V + 0.33 V
-55 ºC to +125 ºC
-40 ºC to +85 ºC
K : ±31.5 × 10
-6
L : ±50 × 10
-6
90 mA Max.
40 mA Max.
70 mA Max.
45 % to 55 %
V
CC
- 1.025 V Min.
V
CC
- 1.62 V Max.
50 Ω
70% V
CC
Min.
30% V
CC
Max.
400 ps Max.
10 ms Max.
1.5 ms Max.
Conditions / Remarks
-
-
Store as bare product after packing
-
Customized Product (Option)
OE Active, L_ECL = 50 Ω
OE Inactive, Output Standby: Hi-Z mode
OE Inactive, Output Standby: Fix mode
At outputs crossing point
DC characteristics
Termination to V
CC
- 2.0 V
SG-8503CA : OE, FSEL
SG-8504CA : OE, FSEL0, FSEL1
Between 20% and 80% of (V
OH
- V
OL
)
Time at minimum supply voltage to be 0 s
SG-8503CA :
From setting FSEL pin to output new frequency
SG-8504CA :
From setting FSEL0 / FSEL1 pin to output new
frequency
*1 Frequency tolerance includes initial frequency tolerance, temperature variation, supply voltage change, reflow drift and 10 years aging at +25 ºC.
Product Name
SG-8503 CA 156MHz 625MHz A P R L Z
(Standard form)
 
    
Model,
Package type,
Frequeny-0 (50 ~ 800 MHz),
Frequency-1 (50 ~ 800 MHz),
Internal crystal frequency,
Output enable pin Polarity,
Supply voltage/Output format,
Frequency tolerance/Operating temperature,
Output standby type
Product Name
SG-8504 CA 156.2MHz nnnn A P R L Z
(Standard form)
 
    
Model,
Package type,
Frequeny-0 (50 ~ 800 MHz),
Parameter identifier,
Internal crystal frequency,
Output enable pin Polarity,
Supply voltage/Output format,
Frequency tolerance/Operating temperature,
Output standby type
Internal crystal
frequency
A 114.1444 MHz
Output enable
pin Polarity
P Active High
Q Active Low
Supply voltage/
Output format
R 2.5 V ~ 3.3 V/LVPECL
Frequency tolerance/
Operating temperature
K ±31.5 × 10
-6
/-40 to +85 °C
L ±50 × 10
-6
/-40 to +85 °C
Output standby type
F
Z
Fix (OUT=”L”, OUTN=”H”)
High-Z
Phase Jitter
Offset Frequency
Phase jitter
*2
Typ.
*2
100.00 MHz
0.31 ps
125.00 MHz
0.30 ps
156.25 MHz
0.26 ps
250.00 MHz
0.26 ps
312.50 MHz
0.29 ps
500.00 MHz
0.28 ps
625.00 MHz
0.29 ps
12 kHz to 20 MHz
In order to achieve optimum jitter performance, it is recommended that the capacitor (0.1 μF + 10 μF) between V
CC
and GND pin should be placed as close to the V
CC
pin as possible.
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