LTC2232/LTC2233
10-Bit,105Msps/
80Msps ADCs
FEATURES
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DESCRIPTIO
■
Sample Rate: 105Msps/80Msps
61dB SNR up to 140MHz Input
75dB SFDR up to 200MHz Input
775MHz Full Power Bandwidth S/H
Single 3.3V Supply
Low Power Dissipation: 475mW/366mW
Selectable Input Ranges:
±0.5V
or
±1V
No Missing Codes
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit)
105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit)
80Msps: LTC2223 (12-Bit), LTC2233 (10-Bit)
48-Pin 7mm x 7mm QFN Package
The LTC
®
2232 and LTC2233 are 105Msps/80Msps, sam-
pling 10-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. The LTC2232/
LTC2233 are perfect for demanding communications
applications with AC performance that includes 61dB SNR
and 75dB spurious free dynamic range for signals
up to 200MHz. Ultralow jitter of 0.15ps
RMS
allows
undersampling of IF frequencies with excellent noise
performance.
DC specs include
±0.15LSB
INL (typ),
±0.1LSB
DNL (typ)
and
±0.8LSB
INL,
±0.6LSB
DNL over temperature. The
transition noise is a low 0.12LSB
RMS
.
A separate output power supply allows the outputs to drive
0.5V to 3.6V logic.
The ENC
+
and ENC
–
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL, or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Wireless and Wired Broadband Communication
Cable Head-End Systems
Power Amplifier Linearization
Communications Test Equipment
TYPICAL APPLICATIO
REFH
REFL
3.3V
V
DD
FLEXIBLE
REFERENCE
0.5V
TO 3.6V
OV
DD
ANALOG
INPUT
INPUT
S/H
–
10-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
SFDR (dBFS)
+
D9
•
•
•
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
22323 TA01
ENCODE INPUT
U
SFDR vs Input Frequency
90
85
4th OR HIGHER
80
75
70
2nd OR 3rd
65
60
55
50
0
100
200
300
400
500
600
22323 TA01b
INPUT FREQUENCY (MHz)
22323fa
U
U
1
LTC2232/LTC2233
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
48 GND
47 V
DD
46 V
DD
45 GND
44 V
CM
43 SENSE
42 MODE
41 OF
40 D9
39 D8
38 OGND
37 OV
DD
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ............... –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2232C, LTC2233C ............................. 0°C to 70°C
LTC2232I, LTC2233I ...........................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
A
IN+
1
A
IN–
2
REFHA 3
REFHA 4
REFLB 5
REFLB 6
REFHB 7
REFHB 8
REFLA 9
REFLA 10
V
DD
11
V
DD
12
49
36 D7
35 D6
34 D5
33 OV
DD
32 OGND
31 D4
30 D3
29 D2
28 OV
DD
27 OGND
26 D1
25 D0
UK PACKAGE
48-LEAD (7mm
×
7mm) PLASTIC QFN
EXPOSED PAD IS GND (PIN 49),
MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
LTC2232CUK
LTC2232IUK
LTC2233CUK
LTC2233IUK
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error (Note 5)
Differential Linearity Error
Integral Linearity Error (Note 5)
Differential Linearity Error
Offset Error (Note 6)
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
GND 13
V
DD
14
GND 15
ENC
+
16
ENC
–
17
SHDN 18
OE 19
CLOCKOUT 20
NC 21
OGND 22
OV
DD
23
NC 24
T
JMAX
= 125°C,
θ
JA
= 29°C/W
UK PART
MARKING*
LTC2232UK
LTC2232UK
LTC2233UK
LTC2233UK
MIN
10
–0.8
–0.6
●
●
TYP
±0.15
±0.1
±0.5
±0.1
MAX
0.8
0.6
UNITS
Bits
LSB
LSB
LSB
LSB
Differential Analog Input
Differential Analog Input
Single-Ended Analog Input
Single-Ended Analog Input
●
–37
–2.5
±5
±0.5
±10
±30
±15
0.12
37
2.5
External Reference
Internal Reference
External Reference
SENSE = 1V
●
%FS
µV/C
ppm/C
ppm/C
LSB
RMS
22323fa
2
U
mV
W
U
U
W W
W
U
LTC2232/LTC2233
A ALOG I PUT
SYMBOL
V
IN
V
IN, CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
PARAMETER
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Pull-Down Current to GND
Full Power Bandwidth
Sample and Hold Acquisition Delay Time
Sample and Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Figure 8 Test Circuit
CONDITIONS
3.1V < V
DD
< 3.5V
Differential Input
Single Ended Input (Note 7)
0 < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
●
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
30MHz Input (1V Range)
30MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
SFDR
Spurious Free Dynamic Range
30MHz Input (1V Range)
30MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
30MHz Input (1V Range)
30MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
S/(N+D)
Signal-to-Noise Plus
Distortion Ratio
30MHz Input (1V Range)
30MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
IMD
Intermodulation Distortion
f
IN1
= 138MHz, f
IN2
= 140MHz
●
●
●
U
W U
U
MIN
1
0.5
–1
–1
TYP
±0.5
to
±1
1.6
1.6
MAX
1.9
2.1
1
1
UNITS
V
V
V
µA
µA
µA
MHz
ns
ps
RMS
dB
10
775
0
0.15
80
LTC2232
MIN
TYP
MAX
60.4
59.8
61.3
59.8
61.2
59.8
61.2
59.6
61.1
69
80
78
80
78
78
78
71
70
86
86
86
86
86
86
86
86
60.2
59.8
61.3
59.8
61.2
81
LTC2233
MIN
TYP
MAX
60.4
59.9
61.3
59.8
61.3
59.8
61.2
59.7
61.2
69
80
78
80
78
78
78
73
72
86
86
86
86
86
86
86
86
60.2
59.9
61.3
59.8
61.2
81
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
22323fa
3
LTC2232/LTC2233
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
3.1V < V
DD
< 3.5V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
ID
V
ICM
R
IN
C
IN
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3.3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3.3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
PARAMETER
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
(Note 7)
V
DD
= 3.3V
V
DD
= 3.3V
V
IN
= 0V to V
DD
(Note 7)
CONDITIONS
ENCODE INPUTS (ENC
+
, ENC
–
)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
LOGIC INPUTS (OE, SHDN)
●
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.570
TYP
1.600
±25
3
4
MAX
1.630
UNITS
V
ppm/°C
mV/V
Ω
TYP
MAX
UNITS
V
0.2
1.1
1.6
1.6
6
3
2
0.8
–10
3
10
2.5
Internally Set
Externally Set (Note 7)
●
V
V
kΩ
pF
V
V
µA
pF
3
50
50
●
●
pF
mA
mA
V
V
0.4
V
V
V
V
V
V
3.1
3.295
3.29
0.005
0.09
2.49
0.09
1.79
0.09
22323fa
LTC2232/LTC2233
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
SYMBOL
V
DD
OV
DD
I
VDD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Power Dissipation
Shutdown Power
Nap Mode Power
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
CONDITIONS
●
●
●
●
POWER REQUIRE E TS
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
S
t
L
t
H
t
AP
t
D
t
C
t
OE
Pipeline Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they will
be clamped by internal diodes. This product can handle input currents of
greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3.3V, f
SAMPLE
= 105MHz (LTC2232) or 80MHz (LTC2233),
differential ENC
+
/ENC
–
= 2V
P-P
sine wave, input range = 2V
P-P
with differential
drive, unless otherwise noted.
PARAMETER
Sampling Frequency
ENC Low Time (Note 8)
ENC High Time (Note 8)
Sample-and-Hold Aperture Delay
ENC to DATA Delay
ENC to CLOCKOUT Delay
DATA to CLOCKOUT Skew
Output Enable Delay
(Note 7)
(Note 7)
(t
C
- t
D
) (Note 7)
(Note 7)
●
●
●
●
TI I G CHARACTERISTICS
U W
LTC2232
MIN
TYP
MAX
3.1
0.5
3.3
3.3
144
475
2
35
3.5
3.6
162
535
LTC2233
MIN
TYP
MAX
3.1
0.5
3.3
3.3
111
366
2
35
3.5
3.6
123
406
UNITS
V
V
mA
mW
mW
mW
UW
CONDITIONS
●
LTC2232
MIN
TYP
MAX
1
4.5
3
4.5
3
1.3
1.3
– 0.6
4.76
4.76
4.76
4.76
0
2.1
2.1
0
5
5
4
4
0.6
10
105
500
500
500
500
●
●
●
●
LTC2233
MIN
TYP
MAX
1
5.9
3
5.9
3
1.3
1.3
–0.6
6.25
6.25
6.25
6.25
0
2.1
2.1
0
5
5
4
4
0.6
10
80
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve. The
deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when the
output code flickers between 00 0000 0000 and 11 1111 1111 in 2’s
complement output mode.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
Recommended operating conditions.
Note 9:
V
DD
= 3.3V, f
SAMPLE
= 105MHz (LTC2232) or 80MHz (LTC2233),
differential ENC
+
/ENC
–
= 2V
P-P
sine wave, input range = 1V
P-P
with differential
drive.
22323fa
5
FPGA/CPLD
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