电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SG3225VAN 100.000000M-KEGA3

产品描述OSC XO 100.000MHZ LVDS SMD
产品类别无源元件   
文件大小829KB,共2页
制造商EPSON
官网地址http://www.epsondevice.com
标准
下载文档 全文预览

SG3225VAN 100.000000M-KEGA3概述

OSC XO 100.000MHZ LVDS SMD

文档预览

下载PDF文档
Crystal oscillator
CRYSTAL OSCILLATOR (SPXO)
OUTPUT : LV-PECL, LVDS
Product Number (please contact us)
SG3225EAN
/
VAN
SG5032EAN
/
VAN
SG7050EAN
/
VAN
Achieved wide frequency range by PLL technology and AT crystal units
•Frequency
range
:
73.5 MHz to 700 MHz
•Supply
voltage
:
2.5 V to 3.3 V
•Function
:
Output enable (OE)
Output
:
LV-PECL or LVDS
SG3225EAN/VAN
(3.2 × 2.5 × 1.05 mm)
Actual size
SG3225EAN/VAN
SG3225EAN: X1G004251xxxx00
SG3225VAN: X1G004241xxxx00
SG5032EAN: X1G004271xxxx00
SG5032VAN: X1G004261xxxx00
SG7050EAN: X1G004291xxxx00
SG7050VAN: X1G004281xxxx00
SG5032EAN/VAN
SG7050EAN/VAN
(5.0 × 3.2 × 1.0 mm) (7.0 × 5.0 × 1.4 mm)
SG7050EAN/VAN
SG5032EAN/VAN
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature
Frequency tolerance
Current consumption
Disable current
Symmetry
Output voltage (LV-PECL)
Symbol
f
0
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
V
OD
dV
OD
V
OS
dV
OS
L_ECL
L_LVDS
V
IH
V
IL
t
r
/ t
f
t_str
t
PJ
f_aging
Specifications
LV-PECL
LVDS
SG3225EAN / SG5032EAN /
SG3225VAN / SG5032VAN /
SG7050EAN
SG7050VAN
73.5 MHz to 700 MHz
K: 2.5 V - 10 % to 3.3 V + 10 %
-40
°C
to +125
°C
B: -20
°C
to +70
°C,
G: -40
°C
to +85
°C
J:
±
50
×
10
-6
, E:
±
30
×
10
-6
, C:
±
20
×
10
-6
65 mA Max.
30 mA Max.
20 mA Max.
45 % to 55 %
V
CC
- 1.0 V to V
CC
- 0.8 V
V
CC
- 1.78 V to V
CC
- 1.62 V
250 mV to 450 mV
50 mV Max.
1.15 V to 1.35 V
150 mV Max.
50
100
70 % V
CC
Min.
30 % V
CC
Max.
350 ps Max.
3 ms Max.
0.6 ps Max.
*1
±
5
×
10
-6
/ year Max.
(
300 ps Max.
Conditions / Remarks
Please contact us about available frequencies.
Storage as single product.
OE = Vcc, L_ECL = 50 or L_LVDS = 100
OE = GND
At outputs crossing point
DC characteristics
V
OD1
, V
OD2
dV
OD
=
|
V
OD1
-V
OD2
|
V
OS1
, V
OS2
dV
OS
=
|
V
OS1
-V
OS2
|
Terminated to V
CC
-2.0 V
Connected between OUT to
OUT
OE terminal
LV-PECL: Between 20 % and 80 % of (VOH-VOL).
LVDS:
Between 20 % and 80 %of Differential Output
peak to peak voltage
Time at minimum supply voltage to be 0 s
Offset frequency: 12 kHz to 20 MHz
+25
°C,
First year, V
CC
= 2.5 V, 3.3 V
*1
0.9 ps Max. (f
0
= 243 MHz ~ 250 MHz, 486 MHz ~ 500 MHz)
Output voltage (LVDS)
Output load condition
(ECL) / (LVDS)
Input voltage
Rise time / Fall time
Start-up time
Phase Jitter
Frequency aging
DC characteristics
Product Name
(Standard form)
SG3225 E AN 156.250000MHz K J G A
Model
CG is not available)
Output (E: LV-PECL, V: LVDS)
Frequency
Internal identification code (“A” is default)
Frequency tolerance
Operating temperature
Frequency tolerance
K
2.5 V ~ 3.3 V
J
E
C
±50 × 10
±30 × 10
-6
±20 × 10
-6
-6
B
G
-20 ° ~ +70 °
C
C
-40 ° ~ +85 °
C
C
(Unit: mm)
Footprint (Recommended)
E
#5
B
#4
A
#1
Size
A
B
C
D
E
SG3225 type
1.05
0.86
1.85
2.58
0.82
External dimensions
(Unit: mm)
#6
#2
D
SG5032 type
1.60
0.89
2.60
2.54
0.89
#3
SG7050 type
2.00
1.80
4.20
5.08
1.80
To maintain stable operation, provide a 0.01 µF to
0.1 µF by-pass capacitor at a location as near as
possible to the power source terminal of the
crystal product (between Vcc - GND).
C

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1165  828  2780  1741  468  24  17  56  36  10 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved