NCP81382
Integrated Driver
and MOSFET
The NCP81382 integrates a MOSFET driver, high−side MOSFET
and low−side MOSFET into a single package.
The driver and MOSFETs have been optimized for high−current
DC−DC buck power conversion applications. The NCP81382
integrated solution greatly reduces package parasitics and board space
compared to a discrete component solution.
Features
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MARKING
DIAGRAM
QFN36 6x4
CASE 485DZ
1
36
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
81382
ALYWG
G
•
•
•
•
•
•
•
•
•
•
•
•
•
Capable of Average Currents up to 35 A
Capable of Switching at Frequencies up to 2 MHz
Capable of Peak Currents up to 70 A
Compatible with 3.3 V or 5 V PWM Input
Responds Properly to 3−level PWM Inputs
Option for Zero Cross Detection with 3−level PWM
ZCD_EN Input for Diode Emulation with 2−level PWM
Internal Bootstrap Diode
Undervoltage Lockout
Supports Intel® Power State 4
Thermal Warning output
Thermal Shutdown
This is a Pb−Free Device
(Note: Microdot may be in either location)
PINOUT DIAGRAM
SMOD#
3
THWN
1
36 ZCD_EN
35 BOOT
38
TEST
34 PHASED
33 GH
32 PHASEF
31 PGND
30 VIN
29 VIN
28 VIN
27 VIN
26 VIN
25 VIN
PGND 19
PGND 20
PGND 21
PGND 22
PGND 23
PGND 24
CGND
DISB#
2
PWM
4
37
PGND
VCC
6
VCCD 7
GL 8
GL 9
GL 10
GL 11
VSW 12
VSW 13
VSW 14
VSW 15
VSW 16
VSW 17
VSW 18
Applications
•
Desktop & Notebook Microprocessors
5V
VIN
VCCD VCC
Zero Current
Detect Enable
DRVON from controller
PWM from controller
SMOD from controller
ZCD_EN
DISB#
PWM
SMOD#
CGND
VIN
THWN
BOOT
PHASED
PHASEF
VSW
PGND
VOUT
Figure 1. Application Schematic
ORDERING INFORMATION
Device
NCP81382MNTXG
Package
QFN36
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2016
1
5
(Top View)
February, 2016 − Rev. 2
Publication Order Number:
NCP81382/D
NCP81382
VCCD 7
35 BOOT
33 GH
25 − 30 VIN
VCC 6
LEVEL
SHIFT
VCC
UVLO
12 − 18 VSW
32 PHASEF
34 PHASED
SMOD# 3
PWM 4
DEAD
TIME
CONTROL
LOGIC
SHUTDOWN
TEMP
WARNING SENSE
19 PGND
20 PGND
21 PGND
DISB# 2
LEVEL
SHIFT
22 PGND
23 PGND
24 PGND
31 PGND
THWN 1
37 PGND
VCC
11
GL
10 GL
ZCD_EN 36
CGND 5
ZCD
CONTROL
9
8
GL
GL
38 TEST
Figure 2. Block Diagram
PIN LIST AND DESCRIPTIONS
Pin No.
1
2
3
Symbol
THWN
DISB#
SMOD#
Description
Thermal warning indicator. This is an open−drain output. When the temperature at the driver die
reaches T
THWN
, this pin is pulled low.
Output disable pin. When this pin is pulled to a logic high level, the driver is enabled. There is an
internal pull−down resistor on this pin.
Skip Mode pin. 3−state input (see Table 1 LOGIC TABLE):
SMOD# = High
³
States of ZCD_EN and PWM determine whether the NCP81382 performs
ZCD or not.
SMOD# = Mid
³
Connects PWM to internal resistor divider placing a bias voltage
on PWM pin. Otherwise, logic is equivalent to SMOD# in the high state.
SMOD# = Low
³
Placing PWM into mid−state pulls GH and GL low without delay.
There is an internal pull−up resistor to VCC on this pin.
PWM Control Input and Zero Current Detection Enable
Signal Ground
Control Power Supply Input
Driver Power Supply Input
Low Side FET Gate Access
Low Side FET Gate Access
Low Side FET Gate Access
Low Side FET Gate Access
Switch Node Output
Switch Node Output
Switch Node Output
Switch Node Output
Switch Node Output
Switch Node Output
Switch Node Output
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PWM
CGND
VCC
VCCD
GL
GL
GL
GL
VSW
VSW
VSW
VSW
VSW
VSW
VSW
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2
NCP81382
PIN LIST AND DESCRIPTIONS
(continued)
Pin No.
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Symbol
PGND
PGND
PGND
PGND
PGND
PGND
VIN
VIN
VIN
VIN
VIN
VIN
PGND
PHASEF
GH
PHASED
BOOT
ZCD_EN
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Conversion Supply Power Input
Conversion Supply Power Input
Conversion Supply Power Input
Conversion Supply Power Input
Conversion Supply Power Input
Conversion Supply Power Input
Power Ground
Bootstrap Capacitor Return (must be connected to PHASED)
High Side FET Gate Access
Driver Phase Connection (must be connected to PHASEF)
Bootstrap Voltage
PWM drive logic and zero current detection enable. 3−state input:
PWM = High
³
GH is high, GL is low.
PWM = Mid
³
Diode emulation mode.
PWM = Low
³
GH is low. State of GL is dependent on states of SMOD# and ZCD_EN
(see Table 1 LOGIC TABLE).
Power Ground
No connection should be made to this pin. No pad is needed on the PCB footprint
Description
37
38
PGND
TEST
ABSOLUTE MAXIMUM RATINGS
(Electrical Information − all signals referenced to PGND unless noted otherwise) (Note 1)
Pin Name
VCC, VCCD
GH to PHASED (DC)
GH to PHASED (< 50 ns)
VIN
BOOT (DC)
BOOT (< 20 ns)
BOOT to PHASED (DC)
VSW, PHASED, PHASEF (DC)
VSW, PHASED, PHASEF (< 20 ns)
VSW, PHASED, PHASEF (< 5 ns)
All Other Pins
Single−Pulse Drain−to−Source Avalanche Energy, High−Side FET
(T
J
= 25°C, V
GS
= 5 V, L = 0.1 mH, R
G
= 25
W,
I
L
= 54 A
PK
)
Single−Pulse Drain−to−Source Avalanche Energy, Low−Side FET
(T
J
= 25°C, V
GS
= 5 V, L = 0.3 mH, R
G
= 25
W,
I
L
= 31.5 A
PK
)
Single−Pulse Drain−to−Source Avalanche Energy, High−Side FET
(T
J
= 25°C, L = 0.15
mH,
I
L
= 90 A
PK
, V
DS
dV/dt= 30 V / 2 ns)
Single−Pulse Drain−to−Source Avalanche Energy, Low−Side FET
(T
J
= 25°C, L = 150 nH, I
L
= 90 A
PK
, V
DS
dV/dt= 30 V / 4 ns)
Min
−0.3
−0.3
−5.0
−0.3
−0.3
−0.3
−0.3
−0.3
−1.0
−5.0
−0.3
−
−
−
−
Max
6.5
V
BOOT
− V
SW
+ 0.3
7.7
30
35
40
6.5
30
−
37
V
VCC
+ 0.3
144
180
200
200
Unit
V
V
V
V
V
V
V
V
V
V
V
mJ
mJ
mJ
mJ
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Absolute Maximum Ratings are not tested in production.
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NCP81382
THERMAL INFORMATION
Rating
Thermal Resistance
Symbol
q
JA
RY
J−BT
RY
J−CT
Operating Junction Temperature Range (Note 2)
Operating Ambient Temperature Range
Maximum Storage Temperature Range
Maximum Power Dissipation
Moisture Sensitivity Level
2. The maximum package power dissipation must be observed.
3. JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM
4. JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM
MSL
T
STG
T
J
Value
22
2
4
−40 to +150
−40 to +125
−40 to +150
10
3
Unit
_C/W
_C/W
_C/W
_C
_C
_C
W
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage Range
Conversion Voltage
Continuous Output Current
Pin Name
VCC, VCCD
VIN
F
SW
= 1 MHz, V
IN
= 12 V, V
OUT
= 1.1 V
F
SW
= 500 kHz, V
IN
= 12 V, V
OUT
= 1.1 V
Peak Output Current
Operating Temperature
F
SW
= 500 kHz, V
IN
= 12 V, V
OUT
= 1.1 V,
Duration = 10 ms, Period = 1 s
−40
Conditions
Min
4.5
4.5
Typ
5.0
12
Max
5.5
20
30
35
70
100
Unit
V
V
A
A
A
_C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
VCC
= V
VCCD
= 5.0 V, V
VIN
= 12 V, V
DISB#
= 2.0 V, C
VCCD
= C
VCC
= 0.1
mF
unless specified otherwise) Min/Max values are valid for the
temperature range −40°C
≤
T
A
≤
125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.
Parameter
VCC SUPPLY CURRENT
Operating
No switching, ZCD enabled
No switching, ZCD disabled
Disabled
DISB# = 5 V, ZCD_EN = 5 V,
PWM = 400 kHz
DISB# = 5 V, ZCD_EN = 5 V,
PWM = 0 V
DISB# = 5 V, ZCD_EN = 0 V,
PWM = 0 V
DISB# = 0 V
ZCD_EN = VCC, SMOD# = VCC
DISB# = 0 V
ZCD_EN = VCC, SMOD# = GND
DISB# = 0 V
ZCD_EN = SMOD# = GND
UVLO Start Threshold
UVLO Hysteresis
VCCD SUPPLY CURRENT
Operating
DISB# = 5 V, ZCD_EN = 5 V, PWM =
400 kHz
−
−
20
mA
V
UVLO
VCC rising
−
2.9
150
−
−
−
−
1
−
−
0.1
10
27
−
−
2
2
1.8
1
13
40
3.3
−
mA
mA
mA
mA
mA
mA
V
mV
Symbol
Conditions
Min
Typ
Max
Unit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NCP81382
ELECTRICAL CHARACTERISTICS
(continued)
(V
VCC
= V
VCCD
= 5.0 V, V
VIN
= 12 V, V
DISB#
= 2.0 V, C
VCCD
= C
VCC
= 0.1
mF
unless specified otherwise) Min/Max values are valid for the
temperature range −40°C
≤
T
A
≤
125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.
Parameter
VCCD SUPPLY CURRENT
Enabled, No switching
Disabled
DISB# INPUT
Input Resistance
Upper Threshold
Lower Threshold
Hysteresis
Enable Delay Time
Disable Delay Time
PWM INPUT
Input High Voltage
Input Mid−state Voltage
Input Low Voltage
Input Resistance
Input Resistance
PWM Input Bias Voltage
PWM Propagation Delay, Rising
PWM Propagation Delay, Falling
Exiting PWM Mid−state Propagation
Delay, Mid−to−Low
Exiting PWM Mid−state Propagation
Delay, Mid−to−High
SMOD# INPUT
SMOD# Input Voltage High
SMOD# Input Voltage Mid−state
SMOD# Input Voltage Low
SMOD# Input Resistance
SMOD# Propagation Delay, Falling
SMOD# Propagation Delay, Rising
ZCD_EN INPUT
ZCD_EN Input Voltage High
ZCD_EN Input Voltage Low
ZCD_EN Hysteresis
ZCD_EN Input Resistance
V
ZCD_EN_HI
V
ZCD_EN_LO
V
ZCD_EN_HYS
R
ZCD_EN_PU
to VCC
2.0
−
−
−
−
−
250
270
−
0.8
−
−
V
V
mV
kW
V
SMOD_HI
V
SMOD#_MID
V
SMOD_LO
R
SMOD#_UP
T
SMOD#_PD_F
T
SMOD#_PD_R
Pull−up resistance to VCC
SMOD# = Low to GL = 90%,
PWM = Low
SMOD# = High to GL = 10%,
ZCD_EN = High, PWM = Low
2.65
1.4
−
−
−
−
−
−
−
440
26
15
−
2.0
0.7
−
30
30
V
V
V
kW
ns
ns
V
PWM_HI
V
PWM_MID
V
PWM_LO
R
PWM
_
HIZ
R
PWM_BIAS
V
PWM_BIAS
tpdl
GL
tpdl
GH
T
PWM_EXIT_L
T
PWM_EXIT_H
SMOD# = V
SMOD#_HI
or V
SMOD#_LO
SMOD# = V
SMOD#_MID
SMOD# = V
SMOD#_MID
PWM = 2.25 V to GL = 90%;
SMOD# = LOW
PWM = 0.75 V to GH = 90%
PWM = Mid−to−Low to GL = 10%,
ZCD_EN = High
PWM = Mid−to−High to GH = 10%
2.65
1.4
−
10
−
−
−
−
−
−
−
−
−
−
63
1.7
25
15
13
13
−
2.0
0.7
−
−
−
35
25
25
25
V
V
V
MW
kW
V
ns
ns
ns
ns
t
ENABLE
t
DISABLE
V
UPPER
V
LOWER
V
UPPER
– V
LOWER
Time from DISB# transitioning HI to
when VSW responds to PWM.
Time from DISB# transitioning LOW to
when both output FETs are off.
To Ground, @ 25°C
−
−
0.8
200
−
−
461
−
−
−
−
25
−
2.0
−
−
40
50
kW
V
V
mV
ms
ns
DISB# = 5 V, PWM = 0 V,
V
PHASED
= 0 V
DISB# = 0 V
−
−
175
0.1
300
1
mA
mA
Symbol
Conditions
Min
Typ
Max
Unit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5