PRELIMINARY
Data Sheet No. PD60274 revA
IRS2130/IRS21303/IRS2132 (J&S)PbF
3-PHASE BRIDGE DRIVER
Features
•
•
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for all channels
Over-current shutdown turns off all six drivers
Three Independent half-bridge drivers
Matched propagation delay for all channels
2.5 V logic compatible
Outputs out of phase with inputs
Cross-conduction prevention logic
All parts are LEAD-FREE
Product Summary
V
OFFSET
I
O
+/- (min.)
V
OUT
t
on/off
(typ.)
Deadtime (typ.)
600 V max.
200 mA / 420 mA
10 V – 20 V (IRS213(0,2))
13 V – 20 V (IRS21303)
500 ns
2.0 µs (IRS2130)
0.7 µs (IRS213(2,03))
Applications:
*Motor Control
*Air Conditioners/ Washing Machines
*General Purpose Inverters
*Micro/Mini Inverter Drives
Description
Packages
The IRS213(0, 03, 2) are high voltage, high speed
power MOSFET and IGBT drivers with three independent
high and low side referenced output channels. Proprietary
HVIC technology enables ruggedized monolithic
construction. Logic inputs are compatible with CMOS or
LSTTL outputs, down to 2.5 V logic. A ground-referenced
operational amplifier provides analog feedback of bridge
28-Lead SOIC
28-Lead PDIP
current via an external current sense resistor. A current trip
function which terminates all six outputs is also derived from
this resistor. An open drain FAULT signal indicates if an
over-current or undervoltage shutdown has occurred. The
output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. Propagation
delays are matched to simplify use at high frequencies. The
44-Lead PLCC w/o 12 Leads
floating channels can be used to drive N-channel power
MOSFETs or IGBTs in the high side configuration which operates up to 600 V.
Typical Connection
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IRS2130/IRS21303/IRS2132 (J&S)PbF
PRELIMINARY
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to V
SO
. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions. Zener clamps are included between V
CC
& V
SO
(25 V), V
CC
&
V
SS
(20V), and V
Bx
& V
Sx
(20 V).
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
dV
S
/dt
P
D
Definition
High side floating supply voltage
High side floating offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
Low side output voltage
Logic input voltage ( HIN1,2,3, LIN1,2,3 & ITRIP)
FAULT output voltage
Operational amplifier output voltage
Operational amplifier inverting input voltage
Allowable offset supply voltage transient
(28 lead PDIP)
Package power dissipation @ T
A
≤
+25 °C
(28 lead SOIC)
(44 lead PLCC)
(28 lead PDIP)
Min.
-0.3
V
B1,2,3
- 20
V
S1,2,3
- 0.3
-0.3
V
CC
- 20
-0.3
V
SS
-0.3
V
SS
-0.3
V
SS
-0.3
V
SS
-0.3
—
—
—
—
—
—
—
—
-55
—
Max.
625
V
B1,2,3
+ 0.3
V
B1,2,3
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
(V
SS
+ 15) or
(V
CC
+ 0.3),
whichever is
lower
V
CC
+0.3
V
CC
+0.3
V
CC
+0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
Units
V
V/ns
W
R
th,JA
T
J
T
S
T
L
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(28 lead SOIC)
(44 lead PLCC)
°C/W
°C
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IRS2130/IRS21303/IRS2132 (J&S)PbF
PRELIMINARY
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. All voltage parameters are absolute voltage referenced to V
SO.
The V
S
offset rating is tested
with all supplies biased at a 15 V differential.
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
T
A
Definition
High side floating supply voltage
High side floating offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
Low side output voltage
Logic input voltage (HIN1,2,3, LIN1,2,3 & ITRIP)
FAULT output voltage
Operational amplifier output voltage
Operational amplifier inverting input voltage
Ambient temperature
IRS213(0,2)
IRS21303
IRS213(0,2)
IRS21303
Min.
V
S1,2,3
+10
V
S1,2,3
+13
Note 1
V
S1,2,3
10
13
-5
0
V
SS
V
SS
V
SS
V
SS
-40
Max.
V
S1,2,3
+20
600
V
B1,2,3
20
5
V
CC
V
SS
+ 5
V
CC
V
SS
+ 5
V
SS
+ 5
125
Units
V
°C
Note 1:
Logic operational for V
S
of (V
SO
- 8 V) to (V
SO
+ 600 V). Logic state held for V
S
of (V
SO
- 8 V) to (V
SO
– V
BS
)
.
(Please refer to the Design Tip DT97-3 for more details).
Note 2:
The CAO pin and all input pins (except CA-) are internally clamped with a 5.2 V zener diode.
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3
IRS2130/IRS21303/IRS2132 (J&S)PbF
PRELIMINARY
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, V
SO1,2,3
= V
SS
and T
A
= 25 °C unless otherwise specified. The V
IN,
V
TH,
and I
IN
parameters
are referenced to V
SS
and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3. The V
O
and I
O
parameters are
referenced to V
SO1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
V
IH
V
IL
V
IT,TH+
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
I
ITRIP+
I
ITRIP-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
V
CCUVH
V
BSUVH
R
on, FLT
I
O+
I
O-
V
OS
I
CA-
CMRR
PSRR
V
OH,AMP
V
OL,AMP
Definition
Logic “0” input voltage (OUT = LO)
Logic “1” input voltage (OUT = HI)
ITRIP input positive going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current (OUT = HI)
Logic “0” input bias current (OUT = LO)
“High” ITRIP bias current
“Low” ITRIP bias current
IRS213(0,2)
V
BS
supply undervoltage
positive going threshold
IRS21303
IRS213(0,2)
V
BS
supply undervoltage
negative going threshold
IRS21303
IRS213(0,2)
V
CC
supply undervoltage
positive going threshold
IRS21303
IRS213(0,2)
V
CC
supply undervoltage
negative going threshold
IRS21303
IRS213(0,2)
Hysteresis
IRS21303
IRS213(0,2)
Hysteresis
IRS21303
FAULT low on-resistance
Output high short circuit pulsed current
Output low short circuit pulsed current
Operational amplifier input offset voltage
CA- input bias current
Operational amplifier common mode
rejection ratio
Operational amplifier power supply
rejection ratio
Operational amplifier high level output
voltage
Operational amplifier low level output
voltage
Min. Typ. Max. Units Test Conditions
2.2
—
400
—
—
—
—
—
—
—
—
—
7.5
11
7.1
9
8.3
11
8
9
—
—
—
—
200
420
—
—
TBD
TBD
4.9
—
—
—
490
—
—
—
30
3
300
220
5
—
8.35
—
7.95
—
9
—
8.7
—
0.3
2
0.4
2
55
250
500
—
—
80
75
5.2
—
—
0.8
580
1
400
50
70
5
400
300
10
100
9.2
13
8.8
11
9.7
13
9.4
11
—
—
—
75
—
mA
—
10
50
—
dB
—
5.4
30
V
mV
mV
nA
V
mV
V
mV
µA
mA
µA
nA
V
IN
= 0 V, Io= 20 mA
V
IN
= 5 V, Io= 20 mA
V
B
= V
S
= 600 V
V
IN
= 0 V
V
IN
= 5 V
ITRIP = 5 V
ITRIP = 0 V
V
Ω
V
O
= 0 V, V
IN
= 0 V
PW
≤
10 µs
V
O
= 15 V, V
IN
= 5 V
PW
≤
10 µs
V
SO
= V
CA-
= 0.2 V
V
CA-
= 2.5 V
V
SO
= V
CA-
= 0.1 V &
1.1 V
V
SO
= V
CA-
= 0.2 V
V
CC
= 10 V & 20 V
V
CA-
= 0 V, V
SO
=1 V
V
CA-
= 1 V, V
SO
=0 V
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4
IRS2130/IRS21303/IRS2132 (J&S)PbF
PRELIMINARY
Static Electrical Characteristics - (Continued)
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, V
SO1,2,3
= V
SS
and T
A
= 25 °C unless otherwise specified. The V
IN,
V
TH
, and I
IN
parameters
are referenced to V
SS
and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3. The V
O
and I
O
parameters are
referenced to V
SO1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
I
SRC,AMP
I
SNK,AMP
I
O+,AMP
I
O-,AMP
Definition
Operational amplifier output source current
Operational amplifier output sink current
Operational amplifier output high short circuit
current
Operational amplifier output low short circuit
current
Min. Typ. Max. Units Test Conditions
4
1
—
—
7
2.1
10
4
—
—
mA
—
—
V
CA-
= 0 V, V
SO
=1 V
V
CAO
= 4 V
V
CA-
= 1 V, V
SO
=0 V
V
CAO
= 2 V
V
CA-
= 0 V, V
SO
=5 V
V
CAO
= 0 V
V
CA-
= 5 V, V
SO
=0 V
V
CAO
= 5 V
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, V
SO1,2,3
= V
SS
, C
L
= 1000 pF, T
A
= 25 °C unless otherwise specified.
Symbol
t
on
t
off
t
r
t
f
t
itrip
t
bl
t
flt
t
flt, in
t
fltclr
DT
SR+
SR-
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
ITRIP to output shutdown propagation delay
ITRIP blanking time
ITRIP to FAULT indication delay
Input filter time (all six inputs)
LIN1,2,3 to FAULT clear time IRS213(0,2)
LIN1,2,3 & HIN1,2,3 to FAULT clear time
IRS21303
IRS2130
Deadtime
IRS213(2,03)
Operational amplifier slew rate (+)
Operational amplifier slew rate (-)
Min. Typ. Max. Units Test Conditions
400
400
—
—
400
—
350
—
500
500
80
35
660
400
550
325
700
700
125
55
920
—
870
—
ns
V
S1,2,3
= 0 V to 600 V
5300 8500 13700
1300 2000 3100
500 700 1100
5
10
—
2.4
3.2
—
V/µs
1 V input step
NOTE:
For high side PWM, HIN pulse width must be > 1.5 µs.
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