TB6584AFNG
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB6584AFNG
3-Phase Full-Wave Sine-Wave PWM Brushless Motor Controller
The TB6584AFNG is designed for motor fan applications for
three-phase brushless DC motors.
Features
•
•
•
•
•
•
Sine-wave PWM control
Triangular-wave generator
(with a carrier frequency of f
osc
/252 Hz)
Lead angle control (0° to 58° in 32 separate steps)
External setting or automatic internal control
Current-limiting input pin
Internal voltage regulator circuit (V
refout
= 5 V (typ.), 30 mA (max))
Operating supply voltage range: V
CC
= 6 V to 16.5 V
Weight: 0.17 g (typ.)
© 2016 TOSHIBA Corporation
1
2016-02-22
TB6584AFNG
Block Diagram
G
in
19
G
out
18
PH 17
Peak hold
LPF 15
LA 13
UL 14
Upper limit
OSC/C 1
OSC/R 2
HUP 3
HUM 4
HVP 5
HVM 6
HWP 7
HWM 8
V
sp
12
V
CC
21
Voltage
regulator
Position
estimation
Internal
ref.
voltage
System clock
generator
5-bit AD
Counter
+
Filter
6-bit
triangular
wave
generator
U
phase
Data V
selector phase
W
phase
Comparator
23 U
Comparator
26 X
Dead
time
control
24 V
27 Y
25 W
120/180
120/180
select
&
gate
block
28 Z
Phase
alignment
Output
waveform
generator
Comparator
GND 9
V
refout
22
Power-on
reset
RES 10
I
dc
20
CW/CCW 11
FGC
16
FG 29
REV 30
Protection
&
Reset
ST/SP
CW/CCW
ERR
GB
FG
Rotation
direction
Comparator PWM
HU
HV
HW
Charger
120°
commutation
matrix
In the above block diagram, part of the functional blocks or constants may be omitted or simplified for explanatory purposes.
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2016-02-22
TB6584AFNG
Pin Configuration
OSC/C
OSC/R
HUP
HUM
HVP
HVM
HWP
HWM
GND
RES
CW/CCW
V
sp
LA
UL
LPF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
REV
FG
Z
Y
X
W
V
U
V
refout
V
CC
Idc
Gin
Gout
PH
FGC
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2016-02-22
TB6584AFNG
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
Symbol
OSC/C
OSC/R
HUP
Position signal input, U
HUM
HVP
Position signal input, V
HVM
HWP
Position signal input, W
HWM
GND
RES
Ground
Reset input
―
L: Runs the motor.
H: Stops the motor. (The commutation output signals are forced Low.)
The RES input has an internal pull down resistor.
L: Clockwise rotation
H: Counterclockwise rotation
The CW/CCW input has an internal pull-up resistor.
The V
sp
input has an internal pull down resistor.
The LA input allows the lead angle to be adjusted between 0° and 58 in 32
separate steps.
The UL input determines the upper limit for the lead angle (UL = 0 to 5.0 V).
A capacitor for the RC low pass filter is connected to this pin.
(A 100 kΩ resistor is contained on-chip.)
H or OPEN: FG = 3 ppr
L: FG = 1 ppr
The FGC input has an internal pull-up resistor.
Gate block protection is activated when UVW = 111 or 000. These inputs
have internal digital filters (
∼
500 ns)
−
Function
Oscillator capacitor
CR oscillation
Oscillator resistor
Description
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
CW/CCW
V
sp
LA
UL
LPF
FGC
PH
Gout
Clockwise/counterclockwise
rotation
Voltage command input
Lead angle (LA) control input
Upper limit for LA
RC low pass filter capacitor
FG output signal select input
Peak hold
Gain setting
A peak-hold capacitor and a discharge resistor are connected to this pin.
The Gin and Gout pins are used to amplify the Idc level so that the lead
angle will be optimal.
The DC-link current is applied to the Idc input. The reference voltage is
0.5 V. The Idc input has an internal RC filter (with a time constant of 1
μs)
and a digital filter (with a time constant of 1
μs).
V
CC
= 6 to 16.5 V
5 V (typ.), 30 mA (max)
A capacitor for oscillation prevention is connected to the V
refout
output.
Gin
Idc
V
CC
V
refout
U
V
W
X
Y
Z
FG
REV
Current limit control input
Power supply
Reference voltage output
Commutation signal output U,
(U high-side)
Commutation signal output V,
(V high-side)
Commutation signal output W,
(W high-side)
High-active
Commutation signal output X,
(U low-side)
Commutation signal output Y,
(V low-side)
Commutation signal output Z,
(W low-side)
FG signal output
Reverse rotation detection
signal
FGC = H or OPEN: FG = 3 ppr output
FGC = L: FG = 1 ppr output *ppr: One pulse per an electrical angle
The REV output is used to detect an occurrence of reverse rotation.
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TB6584AFNG
Input/Output Equivalent Circuits
Equivalent circuit diagrams may be partially omitted or simplified for explanatory purposes.
Pin
Symbol
Input/Output Signal
Internal Circuit
V
refout
V
refout
Position signal input, U
Position signal input, V
Position signal input, W
HUP
HUM
HVP
HVM
HWP
HWM
Analog
Hysteresis: ±7.5 mV (typ.)
V
refout
V
refout
Clockwise/counterclockwise
rotation
CW/CCW
L: CW
H: CCW
L: 0.8 V (max)
H: V
refout
− 1 V (min)
Digital
100 kΩ
2.0 kΩ
V
refout
Reset input
L: Runs the motor.
H: Stops the motor. (Reset)
RES
Digital
2.0 kΩ
100 kΩ
V
refout
V
refout
FG signal select input
H or OPEN: FG = 3 ppr
L: FG = 1 ppr
Digital
FGC
L: 0.8 V (max)
H: V
refout
− 1 V (min)
100 kΩ
V
CC
100
Ω
200 kΩ
100
Ω
100
Ω
150 kΩ
L: 0.8 V (max)
H: V
refout
− 1 V (min)
Voltage command signal
1.0 V
<
Vsp ≤ 2.1 V
Refresh operation
(The X, Y and Z pins have a
conduction duty cycle of 8%.)
Vsp
Analog
Vsp voltage range: 0 to 10 V
When 5.7 V ≤ Vsp ≤ 7.3 V, the PWM
duty cycle is fixed at 92% (typ.).
When 8.2 V ≤ Vsp ≤ 10 V, the
TB6584AFNG is put in test mode.
To fix the lead angle externally, UL and
V
refout
should be connected together.
The lead angle is linearly determined
according to the voltage applied to the
LA input.
LA voltage range: 0 to 5.0 V (V
refout
)
If LA
>
V
refout
, the commutation occurs
with the maximum lead angle of 58°.
When configured for auto lead angle
control, the LA input should be left
OPEN. At this time, the LA input can
be used to check the lead angle in real
time.
Lead angle control input
0 V: 0°
5 V: 58°
(5-bit AD)
LA
From auto
lead angle
circuitry
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2016-02-22
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