19-6328; Rev 0; 5/12
MAX9611PMB1 Peripheral Module
General Description
The MAX9611PMB1 peripheral module provides the
necessary hardware to interface the MAX9611 current-
sense amplifier with 12-bit ADC and op amp, along
with the MAX5380 8-bit DAC, to any system that utilizes
PmodK-compatible expansion ports configurable for
I
2
C communication. The IC is configured with an exter-
nal p-channel FET and a current-sense resistor to form
a current-limiting circuit capable of handling currents
up to 1A. An 8-bit DAC (U1) is used to set the current-
limit point programmatically by the host through the I
2
C
bus. In addition to providing a programmable current-
limit function, the ADC within the IC measures the load
current/voltage and the set-point voltage that can be
read by the host through the I
2
C bus.
Refer to the MAX9611 IC data sheet for detailed informa-
tion regarding operation of the IC.
Features
S
Programmable Current Limit Up to 1A
S
Two Current Ranges (Jumper Selectable)
S
Measure and Read Back Load Current, Load
Voltage, and Set Point
S
Power Source Up to 30V
S
Jumper-Selectable I
2
C Address Setting for the
MAX9611
S
6-Pin Pmod-Compatible Connector (I
2
C)
S
Secondary Header Allows Daisy-Chaining of
Additional Modules on the I
2
C Bus
S
Example Software Written in C for Portability
S
RoHS Compliant
S
Proven PCB Layout
S
Fully Assembled and Tested
Ordering Information
appears at end of data sheet.
MAX9611PMB1 Peripheral Module
Pmod is a trademark of Digilent Inc.
_________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX9611PMB1 Peripheral Module
Component List
DESIGNATION
C1, C2, C3
QTY
3
DESCRIPTION
0.1FF
Q10%,
16V X7R ceramic
capacitors (0603)
Murata GRM188R71C104KA01D
4.7FF
Q10%,
10V X5R ceramic
capacitor (0603)
TDK C2012X5R1A475K/0.85
10FF
Q10%,
10V X5R ceramic
capacitor (0603)
TDK C2012X5R1A106K/1.25
1FF
Q10%,
10V X7R ceramic
capacitor (0603)
TDK C1608X7R1A105K
0.01FF
Q10%,
16V X7R ceramic
capacitor (0603)
Murata GRM188R71C103KA01D
4.7FF EMI filter (3-terminal
capacitor)
Murata NFM21PC475B1A3D
6-pin right-angle male header
8-pin (2 x 4) straight male header
3-pin straight male headers
—
—
3
1
DESIGNATION
Q1
R1–R5
R6, R7
R8
R9
R10
R11
R12
R13
R14, R15
U1
QTY
1
5
2
1
1
1
1
1
1
2
1
DESCRIPTION
2.2A, 30V p-channel MOSFET
(3 SOT23)
Vishay Si2303CDS
4.7kI
Q1%
resistors (0603)
150I
Q5%
resistors (0603)
7.5kI
Q1%
resistor (1206)
845I
Q1%
resistor (1206)
4.02kI
Q1%
resistor (0603)
402I
Q1%
resistor (0603)
8.06kI
Q1%
resistor (0603)
0.2I
Q1%,
2W current-sense
resistor (2512)
Stackpole CSRN2512FKR200
10kI
Q5%
resistors (0603)
Low-cost, 8-bit DAC (5 SOT23)
Maxim MAX5380MEUK+
Current-sense amplifier with
12-bit ADC (10
FMAX
M
)
Maxim MAX9611AUB+
Shorting jumpers
PCB: EPCB9611PM1
C4
1
C5
1
C6
1
C7
1
F1
J1
J2
J3, JP1,
JP2, JP3
1
1
1
4
U2
1
Component Suppliers
SUPPLIER
PHONE
770-436-1300
847-803-6100
402-563-6866
WEBSITE
www.murata-northamerica.com
www.component.tdk.com
www.vishay.com
Murata Electronics North America, Inc.
TDK Corp.
Vishay
Note:
Indicate that you are using the MAX9611PMB1 when contacting these component suppliers.
Detailed Description
The MAX9611PMB1 peripheral module can interface to
the host in one of two ways. It can plug directly into a
Pmod-compatible port (configured for I
2
C) through con-
nector J1, or in this case, other I
2
C boards can attach to
the same I
2
C bus through connector J2.
Alternatively, the peripheral module can connect to other
I
2
C-based Pmod modules using a 4-conductor ribbon
cable connecting to the J2 connector. In this situation,
pins 1-4 and 5-8 on J2 provide two connections to the
I
2
C bus, allowing the module to be inserted into an I
2
C
bus daisy-chain.
µMAX is a registered trademark of Maxim Integrated Products,
Inc.
Table 1. Connector J1 (I
2
C Communication)
PIN
1
2
3
4
5
6
SIGNAL
N.C.
N.C.
SCL
SDA
GND
VCC
DESCRIPTION
Not connected
Not connected
I
2
C serial clock
I
2
C serial data
Ground
Power supply
I
2
C Interface
I
2
C Interface (Daisy-Chaining Modules)
Connector J1 provides connection of the module to the
Pmod host. The pin assignments and functions adhere
to the Pmod standard recommended by Digilent. See
Table 1.
_________________________________________________________________
Maxim Integrated Products
2
MAX9611PMB1 Peripheral Module
Connector J2 allows the module to be connected through
a daisy-chain from another I
2
C module and/or provide
I
2
C and power connections to other I
2
C modules on the
same bus. See Table 2.
Both the MAX5380M and MAX9611 reside on the I
2
C
bus. The MAX5380M has a fixed I
2
C slave address of
0x62 (other versions of the MAX5380 are available with
different I
2
C slave addresses). The I
2
C slave address
for the MAX9611 can be one of nine different values
depending on the settings on jumpers JP2 and JP3.
Table 3 lists the settings of those jumpers and the cor-
responding values of the slave read and write address.
Refer to the MAX9611/MAX9612 IC data sheet for more
information.
I
2
C Addressing Options
The peripheral module provides high-side current limiting
for an external power supply and load. The supply and
load should be connected to the peripheral module, as
shown in Figure 1. Although the IC is capable of opera-
tion up to 60V, the
external supply should not exceed
30V
due to voltage limitations of the Si2303 pFET. While
the pass components are rated to 2.7A,
operation
above 1A may not yield reliable results
due to thermal
limitations. Reliable operation of this circuit above 1A
should be possible in the user’s application if additional
surface/heatsink area for both the Si2303 pFET and the
0.2I sense resistor is provided.
The J3 connector provides for the attachment of an exter-
nal power supply and load. See Table 4.
Connecting an External
Power Supply and Load
Table 2. Connector J2 (I
2
C Expansion)
PIN
1
2
3
4
5
6
7
8
SIGNAL
SCL
SDA
GND
VCC
SCL
SDA
GND
VCC
DESCRIPTION
I
2
C serial clock
I
2
C serial data
Ground
Power supply
I
2
C serial clock
I
2
C serial data
Ground
Power supply
Table 4. Connector J3 (External Power
and Load)
PIN
SIGNAL
Power
source
DESCRIPTION
This pin should be attached to the positive
terminal of the external power supply. The
external power source should be greater
than 0V and less than 30V.
This pin should be attached to a ground-
referenced load.
External ground. This ground connection
is referenced to the module ground on
pin 5 of connector J1.
1
2
Load
3
Ground
Table 3. I
2
C Slave Addresses (MAX9611)
JP2 (A0)
1-2
1-2
1-2
2-3
2-3
2-3
Open
Open
Open
JP3 (A1)
1-2
2-3
Open
1-2
2-3
Open
1-2
2-3
Open
DEVICE ADDRESS (hex)
WRITE
0xE0
0xE4
0xE6
0xF0
0xF4
0xF6
0xF8
0xFC
0xFE
READ
0xE1
0xE5
0xE7
0xF1
0xF5
0xF7
0xF9
0xFD
0xFF
SENSE
CONTROL
MAX9611PMB1
J3
V+
LD
GND
LOAD
1A MAX
30V DC
MAX
Figure 1. Connection of an External Power Supply and Load
_________________________________________________________________
Maxim Integrated Products
3
MAX9611PMB1 Peripheral Module
Current Limit
Software and FPGA Code
The point at which current limiting begins is determined
by the voltage at pin 4 on the MAX9611 (V
SET
). This volt-
age is set by the output of the DAC (MAX5380) and the
setting of the shunt on JP1, which selects either V
DAC
or
V
DAC
/10. The nominal 2.00V output of the DAC is divided
to 1.26V full scale by the divider formed by R3 and R8
+ R9. The lower tap of that divider (R3 + R8 and R9)
provides 0.126V full scale. The position of the shunt on
JP1 determines which of the two voltages is connected
to V
SET
on the MAX9611. With the shunt connected
between JP1-1 and JP1-2, the higher voltage (V
DAC
) is
connected to V
SET
. This setting allows full-scale current
limit at 2.56A with 10mA steps (Caution: Although soft-
ware settings do not prohibit it, the circuit should not be
operated above 1A output current as overheating and
unreliable operation could result). When the shunt is con-
nected between JP1-2 and JP1-3, the full-scale current is
256mA with 1mA steps.
Important:
The total power dissipation for the pass FET
(Q1) should not exceed 1.5W. This can easily be exceed-
ed with even moderate output current if the load voltage
is high and the load resistance is low.
The JP1 connector determines the current-limit range
and step size.
Note:
Do not operate the board without a
shunt in place, in one of these two positions. See Table 5.
Example software and drivers are available that execute
directly without modification on several FPGA devel-
opment boards that support an integrated or synthe-
sized microprocessor. These boards include the Digilent
Nexys 3, Avnet LX9, and Avnet ZEDBoard, although
other platforms can be added over time. Maxim provides
complete Xilinx ISE projects containing HDL, Platform
Studio, and SDK projects. In addition, a synthesized bit
stream, ready for FPGA download, is provided for the
demonstration application.
The software project (for the SDK) contains several
source files intended to accelerate customer evalu-
ation and design. These include a base application
(maximModules.c) that demonstrates module function-
ality and uses an API interface (maximDeviceSpecific
Utilities.c) to set and access Maxim device functions
within a specific module.
The source code is written in standard ANSI C format, and
all API documentation including theory/operation, register
description, and function prototypes are documented in
the API interface file (maximDeviceSpecificUtilities.h & .c).
The complete software kit is available for download at
www.maxim-ic.com.
Quick start instructions are also
available as a separate document.
Table 5. Jumper JP1 (Current-Limit Range)
SHUNT
POSITION
1-2
2-3
V
SET
V
DAC
V
DAC
/10
FULL-SCALE
CURRENT
LIMIT (A)
2.56
0.256
CURRENT-
LIMIT STEP
SIZE (mA)
10
1
_________________________________________________________________
Maxim Integrated Products
4
J1
VCC2
R6
R7
SCL
SDA
F1
SDA
GND
SCL
OUT
4.7k 1%
R8
7.5k
1%
1
R3
VDD
3
VCC2
SDA
4
SCL
5
C5
10uF
GND
2
2
EMIFILT
U1
3
MAX5380
1
150
150
GND
VCC
VDAC
GND
VCC2
C1
0.1uF
I2C Expansion Connector
R2
4.7k
GND
VCC VCC
GND
R1
4.7k
1
2
3
4
5
6
J2
1
2
3
4
5
6
7
8
VDAC10
R9
845
1%
GND
C4
VCC2
VCC2
C2
0.1uF
VCC2
10
MAX9611
VCC
OUT
8.06k 1%
2
Sense Resistor
9
A0
A1
GND
SET
4
VSET
C3
0.1uF
GND
JP1
1
2
3
GND
VDAC
VDAC10
RS-
VCC2
R5
4.7k
8
3
R13
0.2 1%
2 Watt
1
R12
R11
402
1%
G
D
4.7uF
GND
GND
R10
4.02k
C7
0.01uF
C6
1uF
GND
JP2
1
2
3
GND
JP3
1
2
3
GND
GND
R14
10k
GND
R15
10k
_________________________________________________________________
Maxim Integrated Products
5
J3
S
MAX9611PMB1 Peripheral Module
I2C Address Selection
5
Figure 2. MAX9611PMB11 Peripheral Module Schematic
U2
SDA
SDA
SCL
RS+
SCL
6
7
Q1
Si2303CDS
1
2
3
GND
Power source
Load
Ground
VCC2
R4
4.7k
嵌入式系统
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