Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
µMAX
Junction-to-Ambient Thermal Resistance (θ
JA
) .....206.3°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ...............42°C/W
8-SO
Junction-to-Ambient Thermal Resistance (θ
JA
).........136°C/W
Junction-to-Case Thermal Resistance (θ
JC
)................38°C/W
14-SO
Junction-to-Ambient Thermal Resistance (θ
JA
)......... .82°C/W
Junction-to-Case Thermal Resistance (θ
JC
)................32°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
PARAMETER
POWER SUPPLY
Supply Voltage Range
Supply Current
Power-Supply Rejection Ratio
SHUTDOWN (MAX44291 Only)
Shutdown Input Voltage
Shutdown Current
DC SPECIFICATIONS
Input Common-Mode Range
(V
DD
= +15V, V
SS
= -15V, R
L
= 10kΩ to V
GND
= 0V, V
IN_+
= V
IN_-
= V
GND
= 0V, V
SHDN
= 0V (MAX44291 only), T
A
= -40°C to +125°C.
Typical values are at T
A
= +25°C, unless otherwise noted.) (Note 2)
SYMBOL
V
DD
I
DD
PSRR
CONDITIONS
Guaranteed by PSRR
R
L
= ∞
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
Device disabled
Device enabled
V
SHDN
= V
DD
V
SS
+
1.8
120
110
135
dB
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
125
120
V
DD
- 0.35
V
SS
1
V
DD
- 1.4
V
DD
V
DD
- 3.0
140
MIN
4.5
1.2
TYP
MAX
36
1.9
2.1
UNITS
V
mA
dB
V
SHDN
I
SHDN
V
µA
V
CM
Guaranteed by CMRR test
V
SS
+ 1.8V ≤ V
CM
≤ V
DD
- 1.4V,
T
A
= +25°C
V
SS
+ 2V ≤ V
CM
≤ V
DD
- 1.6V,
-40°C ≤ T
A
≤ +125°C
V
Common-Mode Rejection Ratio
CMRR
www.maximintegrated.com
Maxim Integrated
│
2
MAX44291/MAX44292/
MAX44294
36V, Single/Dual/Quad, Low-Noise Amplifiers with
Maximum 0.5µV/°C Offset Drift
Electrical Characteristics (continued)
(V
DD
= +15V, V
SS
= -15V, R
L
= 10kΩ to V
GND
= 0V, V
IN_+
= V
IN_-
= V
GND
= 0V, V
SHDN
= 0V (MAX44291 only), T
A
= -40°C to +125°C.
Typical values are at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Offset Current
SYMBOL
V
OS
TCV
OS
I
B
I
OS
A
VOL
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
(Note 3)
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
V
SS
+ 0.2V ≤
V
OUT
≤ V
DD
-
0.2V, R
L
= 10kΩ
V
DD
- V
OUT
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
T
A
= +25°C
-40°C ≤ T
A
≤ +125°C
60
4.9
288
0.89
10
5
2
-110
100
100
130
125
100
160
220
160
220
mA
nV/√Hz
nV
P-P
pA/√Hz
MHz
V/µs
µs
dB
pF
mV
140
4
0.2
6
CONDITIONS
MIN
TYP
30
MAX
125
165
0.5
25
55
12
30
UNITS
µV
µV/°C
nA
nA
Open-Loop Gain
dB
V
OH
Output Voltage Swing
V
OL
Output Short-Circuit Current
AC SPECIFICATIONS
Input Voltage-Noise Density
Input Voltage Noise
Input Current-Noise Density
Gain-Bandwidth Product
Slew Rate
Settling Time
Total Harmonic Distortion Plus
Noise
Capacitive Loading
i
N
GBW
SR
t
S
THD+N
C
L
e
N
I
SC
V
OUT
- V
SS
To V
DD
or V
SS
(1s max)
f = 1kHz
0.1Hz ≤ f ≤ 10Hz
f = 1kHz
V
IN
= 100mV
P-P
A
V
= 1V/V, V
OUT
= 2V
P-P
To 0.01%, V
OUT
= 10V
P-P
, C
L
= 100pF, A
V
= 1V/V
f = 1kHz, V
OUT
= 2V
P-P
, A
V
= 1V/V
No sustained oscillation, A
V
= 1V/V
Note 2:
All devices are 100% production tested at T
A
= +25°C. Temperature limits are guaranteed by design.
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