1515
FIXED SIP DELAY LINE
T
D
/T
R
= 10
(SERIES 1515)
FEATURES
•
•
•
•
•
•
Fast rise time for high freq. applications
Very narrow device (SIP package)
Stackable for PC board economy
Low profile
Epoxy encapsulated
Meets or exceeds MIL-D-23859C
data
3
®
delay
devices,
inc.
PACKAGES
1 2
13 14
1515-xxz
xx = Delay (T
D
)
z = Impedance Code
IN GND
GND OUT
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 1515-series device is a fixed, single-input, single-output, passive delay
IN
Signal Input
line. The signal input (IN) is reproduced at the output (OUT), shifted by a
OUT Signal Output
time (T
D
) given by the device dash number. The characteristic impedance
GND Ground
of the line is given by the letter code that follows the dash number (See
Table). The rise time (T
R
) of the line is 10% of T
D
, and the 3dB bandwidth is given by 3.5 / T
D
.
SERIES SPECIFICATIONS
•
•
•
•
•
Dielectric breakdown:
Distortion @ output:
Operating temperature:
Storage temperature:
Temperature coefficient:
50 Vdc
10% max.
-55°C to +125°C
-55°C to +125°C
100 PPM/°C
DASH NUMBER SPECIFICATIONS
Part
Number
1515-10A
1515-20A
1515-30A
1515-40A
1515-50A
1515-60A
1515-70A
1515-80A
1515-90A
1515-100A
1515-10Y
1515-20Y
1515-30Y
1515-40Y
1515-50Y
1515-60Y
1515-70Y
1515-10B
1515-20B
1515-30B
1515-40B
1515-50B
Delay
(ns)
10
±
1.0
20
±
1.0
30
±
1.5
40
±
2.0
50
±
2.5
60
±
3.0
70
±
3.5
80
±
4.0
90
±
4.5
100
±
5.0
10
±
1.0
20
±
1.0
30
±
1.5
40
±
2.0
50
±
2.5
60
±
3.0
70
±
3.5
10
±
1.0
20
±
1.0
30
±
1.5
40
±
2.0
50
±
2.5
Impedance
(Ω)
Ω
50
50
50
50
50
50
50
50
50
50
75
75
75
75
75
75
75
100
100
100
100
100
Ins. Loss
(dB)
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
< 1.0
< 1.0
< 1.0
< 1.0
< 1.0
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
< 1.0
< 1.0
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
Cut-Off
(MHz)
350
175
116
87
70
58
50
43
38
35
350
175
116
87
70
58
50
350
175
116
87
70
IN
(1)
GND
(2)
OUT
(14)
GND
(13)
Functional Diagram
©
2000 Data Delay Devices
Doc #00116
7/20/00
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
1515
1.455
.200
1
2
13 14
.020
.250
.020
1.300
.077
.100
.100
MIN
.010
Package Dimensions
PASSIVE DELAY LINE TEST SPECIFICATIONS
TEST CONDITIONS
INPUT:
Ambient Temperature:
Input Pulse:
25 C
±
3 C
High = 3.0V typical
Low = 0.0V typical
Source Impedance:
50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
at 10% and 90% levels)
Pulse Width (TD <= 75ns):
PW
IN
= 100ns
Period
(TD <= 75ns):
PER
IN
= 1000ns
Pulse Width (TD > 75ns):
PW
IN
= 2 x T
D
Period
(TD > 75ns):
PER
IN
= 10 x T
D
o
o
OUTPUT:
R
load
:
C
load
:
Threshold:
10MΩ
10pf
50% (Rising & Falling)
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
PER
IN
PW
IN
T
RISE
INPUT
SIGNAL
90%
50%
10%
T
FALL
V
IH
90%
50%
10%
V
IL
T
FALL
T
RISE
T
RISE
OUTPUT
SIGNAL
90%
50%
10%
T
FALL
V
OH
90%
50%
10%
V
OL
Timing Diagram For Testing
OUT
PULSE
GENERATOR
TRIG
R
IN
IN
DEVICE UNDER
TEST (DUT)
OUT
IN
TRIG
OSCILLOSCOPE
50
Ω
R
IN
= R
OUT
= Z
LINE
R
OUT
Test Setup
Doc #00116
7/20/00
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
Microchip MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
