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19-2754; Rev 2; 11/05
KIT
ATION
EVALU
BLE
AVAILA
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
General Description
The MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
(referred to as the “MAX2390 family”) fully integrated
direct-conversion receiver ICs are designed for W-CDMA
and TD-SCDMA applications.
The MAX2390 family of receiver ICs have over 90dB of
dynamic gain control, and typical noise figure of 2.7dB
referred to LNA input. Each receiver consists of an ultra-
low-current low-noise amplifier (LNA) with on-chip output
matching and a two-step gain control. The zero-IF
demodulator has a differential circuit topology for mini-
mum LO leakage to receiver’s input. The channel selec-
tivity is done completely in the baseband section of the
receiver with an on-chip lowpass filter. The AGC section
has over 50dB of gain-control range. LO quadrature
generation is done on-chip through a divide-by-2
prescaler. The DC offset cancellation in the I/Q baseband
channels is done fully on-chip using a DC servo loop. To
quickly correct for large DC offset transients in minimal
time, very fast settling time is obtained by optimization of
the DC-offset-cancellation circuit’s time constant.
The MAX2390 family includes a 3-wire serial bus for con-
figuring the different receiver modes. They also include a
SHDN
pin for full device shutdown. The receivers are
fabricated using an advanced high-frequency SiGe
BiCMOS process. The ICs operate from a single +2.7V to
+3.3V supply and are housed in a small 28-pin leadless
QFN-EP and thin QFN-EP packages (5mm x 5mm).
Features
♦
Fully Monolithic Direct-Conversion Receivers
♦
Eliminate External IF SAW + IF AGC + I/Q Demod
♦
Meet all 3GPP Receiver’s Standard Requirements
with at Least 3dB Margin on Eb/No
♦
Operate from a +2.7V to +3.3V Single Supply
♦
Over 90dB of RF+ Baseband Gain-Control Range
♦
Channel Selectivity Over 40dB
♦
Receiver Current Consumption
≈
32mA
♦
On-Chip DC Offset Cancellation
♦
Compatible with Various CMOS Logic Levels
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Pin Configurations/
Functional Diagrams
G_MXR
SDATA
SCLK
V
CC
CS
I+
23
I-
22
28
27
26
25
24
V
CC
RF+
RF-
BIAS
V
CC
G_LNA
LNA_OUT
1
2
3
4
5
6
7
SERIAL
INTERFACE
21 Q-
20 Q+
19 AGC
18 SHDN
17 LD
Applications
IMT2000 Handsets
UMTS Handsets
W-CDMA Band II (PCS)
Handsets
TD-SCDMA Handsets
W-CDMA TDD Handsets
W-CDMA Band III (DCS)
Handsets
MAX2390–MAX2393/
MAX2401
LNA
/2
TANK
INTEGER-N
PLL
13
CP
14
V
CC
16 REFIN
15 V
CC
8
GND
9
LNA_IN
10
GND
11
V
CC
12
TUNE
Pin Configurations continued at end of data sheet.
Ordering Information/Selector Guide
PART
MAX2390ETI
MAX2391ETI
MAX2391ETI+
MAX2392ETI
MAX2392ETI+
MAX2393EGI
MAX2396EGI
MAX2400ETI
MAX2401ETI
MAX2401ETI+
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
28 QFN-EP*
28 QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
APPLICATION
W-CDMA Band II
IMT2000/UMTS
IMT2000/UMTS
TD-SCDMA
TD-SCDMA
W-TDD/TD-SCDMA
IMT2000/UMTS
W-CDMA Band II
W-CDMA Band III
W-CDMA Band III
CHIP RATE (Mcps) RF BAND (MHz) SYNTHESIZER
3.84
3.84
3.84
1.28
1.28
3.84 or 1.28
3.84
3.84
3.84
2.84
1930 to 1990
2110 to 2170
2110 to 2170
2010 to 2025
2010 to 2025
1900 to 1920
2110 to 2170
1930 to 1990
1805 to 1880
1805 to 1880
On-Chip
On-Chip
On-Chip
On-Chip
On-Chip
On-Chip
External
External
On-Chip
On-Chip
*EP
= Exposed paddle.
+
Denotes lead-free package.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +3.6V
All Other Pins to GND.................................-0.3V to (V
CC
+ 0.3V)
LNA_IN ...........................................................................+15dBm
Digital Input Current .........................................................±10mA
Digital Output Open-Collector Current .................................1mA
Continuous Power Dissipation (T
A
= +70°C)
28-Pin QFN (derate 20.8mW/°C above +70°C) ......1666.7mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
CAUTION!
ESD SENSITIVE DEVICE
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V to 3.3V, V
SHDN
= V
DH
(Note 1), G_LNA = G_MXR = V
IH
, HGML mode (see
Table
6), no RF input signals, RF input and
output ports are terminated into 50Ω, baseband I and Q outputs loaded with 10kΩ || 5pF, V
AGC
= 2.2V, T
A
= -40°C to +85°C. Typical
values are for V
CC
= 2.8V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
Supply Voltage
SYMBOL
V
CC
HGML mode
MAX2391, MAX2392,
MAX2393, MAX2400
HGHL mode
LG mode
IDLE mode
HGML mode
Operating Supply Current
I
CC
MAX2396
LG mode
IDLE mode
HGML mode
MAX2390, MAX2401
HGHL mode
LG mode
IDLE mode
All versions
Gain-Control Input Bias Current
I
AGC
0.3V
≤
V
AGC
≤
2.4V
V
AGC
≤
0.3V; V
SHDN
= V
DL
V
I(CM)
= (V
I+
+ V
I-
) / 2,
V
Q(CM)
= (V
Q+
+ V
Q-
) / 2
(V
CM
= 0 in
OPCTRL register)
(V
CM
= 1 in
OPCTRL register)
1.10
1.30
1.20
1.42
SHDN mode
-10
CONDITIONS
MIN
2.7
TYP
2.8
33
34
29
11.5
31
27
10.5
35
36
31
12
0.5
MAX
3.3
39
40
35
13
38
34
12
42
43
37
14
15
+10
3
1.30
V
1.55
0.1
0.4
1.5
V
CC
- 0.5
0
Resistance to GND
50
V
CC
V
CC
0.5
µA
V
V
V
kΩ
µA
µA
mA
UNITS
V
Common-Mode Output Voltage
at I and Q Outputs
V
CM
Lock Indicator High Leakage
Current
Lock Indicator Low Sink
Voltage
SHDN
Input-Logic High
SHDN
Input-Logic Low
SHDN
Input Resistance
V
DH
V
DL
PLL locked, V
LD
= V
CC
(MAX2390–MAX2393, MAX2401)
Sinking 100µA, PLL unlocked
(MAX2390–MAX2393, MAX2401)
MAX2390–MAX2393, MAX2401
MAX2396/MAX2400
2
_______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 2.7V to 3.3V, V
SHDN
= V
DH
(Note 1), G_LNA = G_MXR = V
IH
, HGML mode (see
Table
6), no RF input signals, RF input and
output ports are terminated into 50Ω, baseband I and Q outputs loaded with 10kΩ || 5pF, V
AGC
= 2.2V, T
A
= -40°C to +85°C. Typical
values are for V
CC
= 2.8V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
IDLE
Input-Logic High
IDLE
Input-Logic Low
IDLE
Input Resistance
Digital Input-Logic High
Digital Input-Logic Low
Input-Logic High Current
Input-Logic Low Current
V
IH
V
IL
I
IH
I
IL
-1
CS,
SDATA, SCLK, G_MXR, G_LNA (Note 1)
SYMBOL
V
IH
V
IL
MAX2396,
MAX2400 only
Resistance to GND
CONDITIONS
MIN
V
CC
- 0.5
0
50
0.7
×
V
DH
or
1.2V, whichever
is greater
0
V
CC
0.3
×
V
DH
1
µA
µA
TYP
MAX
V
CC
0.5
UNITS
V
V
kΩ
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
V
AC ELECTRICAL CHARACTERISTICS
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3V
P-P
differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); T
A
= -40°C to +85°C. Typical values are for V
CC
= 2.8V and T
A
= +25°C, unless otherwise noted.)
PARAMETER
LNA PERFORMANCE
MAX2391/MAX2396
MAX2392
RF Frequency Range (Note 2)
f
RF
MAX2393
MAX2390/MAX2400
MAX2401
Signal Phase Change
Power Gain
Noise Figure
Input -1dB Compression Point
3rd-Order Input Intercept Point
(Note 4)
Input Return Loss
Output Return Loss
Reverse Isolation
LNA LOW GAIN (G_LNA = V
IL
)
Power Gain
Noise Figure
Input -1dB Compression Point
G
LNA
NF
LNA
IP-1dB
(Note 3)
(Note 3)
(Note 3)
-6
-12
-8.0
18
-3
-5
22
dB
dB
dBm
∆φ
G
LNA
NF
LNA
IP
-1dB
IIP3
LNA
dB[S11]
dB[S22]
dB[S12]
Switching between any of the LNA modes
(Note 3)
(Note 3)
(Note 3)
MAX2391/MAX2396
MAX2392/MAX2393
MAX2390/MAX2400/MAX2401
On EV kit, externally matched to 50Ω
On EV kit, internally matched to 50Ω
On EV kit
-20
-4.5
-6
-7
13
LNA HIGH GAIN (“HGLNA”, G_LNA = V
IH
)
16
1.5
-16
-2.5
-4
-4
-14
-14
-35
dB
dB
dB
dBm
18
2.0
dB
dB
dBm
2110
2010
1900
1930
1805
2140
2017
1910
1960
1842
8
2170
2025
1920
1990
1880
Degrees
MHz
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
_______________________________________________________________________________________
3
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
AC ELECTRICAL CHARACTERISTICS (continued)
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3V
P-P
differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); T
A
= -40°C to +85°C. Typical values are for V
CC
= 2.8V and T
A
= +25°C, unless otherwise noted.)
PARAMETER
Input Return Loss
Output Return Loss
Reverse Isolation
SYMBOL
dB[S11]
dB[S22]
dB[S12]
CONDITIONS
On EV kit, externally matched to 50Ω
On EV kit, internally matched to 50Ω
On EV kit
HGML mode, V
AGC
= 2.2V
MG or LG mode, V
AGC
= 2.2V
V
AGC
= 0.3V to 2.4V (Note 3)
V
AGC
= 0.3V to 2.4V (Note 3)
HGML or HGHL
mode, V
AGC
≥
1.8V
MAX2391/MAX2392/
MAX2393/MAX2396
MAX2390/MAX2400/
MAX2401
-5
-3.5
80
68
53
25
MIN
TYP
-11
-11
-30
86
76
60
29
10.5
9.5
18.5
-1
0
-16
-23
1.0
0.6
1.5
1.0
+34
dBm
V
P-P
dBm
33
14
13
25
dB
MAX
UNITS
dB
dB
dB
ZERO-IF DEMODULATOR PERFORMANCE (RF+/RF- TO BASEBAND I AND Q OUTPUTS)
Voltage Gain (Note 5)
Baseband Gain-Control Range
Baseband Gain-Control Slope
AV
∆AV
dAV/dV
dB
dB
dB/V
DSB Noise Figure (Notes 3, 6)
NF
MG or LG mode, V
AGC
≥
1.8V
HGML mode, V
AGC
= 2.2V (Note 7)
3rd-Order Input Intercept Point
IIP3
HGHL mode, V
AGC
= 2.2V (Note 3, 7)
MAX2390/MAX2400/MAX2401
HGML or HGHL mode (Note 8)
Input -1dB Compression Point
-1dB Output Compression
Differential Voltage
I
P-1dB
O
V-1dB
LG mode, V
AGC
= 0.5V
All modes
(Note 3)
V
AGC
≥
1.3V
V
AGC
= 0.5V
(MAX2391/MAX2396)
190MHz offset; all modes, V
AGC
≥
0.5V
(Note 9)
(MAX2390/MAX2400)
80MHz offset, all modes, V
AGC
≥
0.5V
(Note 9)
2nd-Order Input Intercept Point
IIP2
(MAX2401)
95MHz offset, all modes, V
AGC
≥
0.5V
(Note 9)
(MAX2390/MAX2391/
MAX2393/MAX2396/
MAX2400/MAX2401)
15MHz offset
(MAX2392)
4.8MHz offset
LO Leakage
I/Q Gain Imbalance
X
LO
|∆G
I/Q
|
At LNA_IN, HGML mode, RX band (Note 3)
All modes, V
AGC
= 0.5V to 2.2V
+33
+33
dBm
+25
+33
V
AGC
= 2.2V, HGML
mode (Note 10)
+25
+33
-100
0.2
-95
1.5
dBm
dB
4
_______________________________________________________________________________________
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