PD - 91607B
IRLR/U3410
HEXFET
®
Power MOSFET
Logic Level Gate Drive
l
Ultra Low On-Resistance
l
Surface Mount (IRLR3410)
l
Straight Lead (IRLU3410)
l
Advanced Process Technology
l
Fast Switching
l
Fully Avalanche Rated
Description
l
D
V
DSS
= 100V
G
S
R
DS(on)
= 0.105Ω
I
D
= 17A
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D -P A K
T O -2 52 A A
I-P A K
T O -25 1 A A
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
17
12
60
79
0.53
± 16
150
9.0
7.9
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
1.9
50
110
Units
°C/W
www.irf.com
1
5/11/98
IRLR/U3410
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Min.
100
–––
–––
–––
–––
1.0
7.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.122
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.2
53
30
26
4.5
7.5
800
160
90
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.105
V
GS
= 10V, I
D
= 10A
0.125 W
V
GS
= 5.0V, I
D
= 10A
0.155
V
GS
= 4.0V, I
D
= 9.0A
2.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 9.0A
25
V
DS
= 100V, V
GS
= 0V
µA
250
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 16V
nA
-100
V
GS
= -16V
34
I
D
= 9.0A
4.8
nC V
DS
= 80V
20
V
GS
= 5.0V, See Fig. 6 and 13
–––
V
DD
= 50V
–––
I
D
= 9.0A
ns
–––
R
G
= 6.0Ω, V
GS
= 5.0V
–––
R
D
= 5.5Ω, See Fig. 10
Between lead,
–––
nH
6mm (0.25in.)
G
from package
–––
and center of die contact
–––
V
GS
= 0V
–––
pF
V
DS
= 25V
–––
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
17
––– –––
showing the
A
G
integral reverse
––– –––
60
p-n junction diode.
S
––– ––– 1.3
V
T
J
= 25°C, I
S
= 9.0A, V
GS
= 0V
––– 140 210
ns
T
J
= 25°C, I
F
=9.0A
––– 740 1100 nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
= 25V, starting T
J
= 25°C, L = 3.1mH
R
G
= 25Ω, I
AS
= 9.0A. (See Figure 12)
T
J
≤
175°C
Pulse width
≤
300µs; duty cycle
≤
2%
Uses IRL530N data and test conditions
I
SD
≤
9.0A, di/dt
≤
540A/µs, V
DD
≤
V
(BR)DSS
,
This is applied for I-PAK, L
S
of D-PAK is measured between lead and
center of die contact
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
2
www.irf.com
IRLR/U3410
100
I
D
, D rain-to-S ource C urrent (A )
I
D
, D rain-to-S ource C urrent (A )
VGS
TOP
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
10
10
2.5V
1
1
2.5V
20µ s P U LS E W ID TH
T
J
= 25°C
0.1
1
10
0.1
A
0.1
0.1
1
20µ s P U LS E W ID TH
T
J
= 175°C
10
A
100
100
V
D S
, D rain-to-S ource V oltage (V )
V
D S
, D rain-to-S ource V oltage (V )
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
3.0
T
J
= 2 5 °C
R
D S (on )
, D rain-to-S ource O n R esistance
(N orm alized)
I
D
= 15A
I
D
, D ra in -to-S o urc e C urren t (A )
2.5
T
J
= 1 7 5 °C
10
2.0
1.5
1
1.0
0.5
0.1
2
3
4
5
6
V
DS
= 5 0V
2 0 µ s P U L S E W ID T H
7
8
9
10
A
0.0
-60 -40 -20
0
20
40
60
80
V
G S
= 10V
100 120 140 160 180
A
V
G S
, G a te -to -S o u rc e V o lta g e (V )
T
J
, Junction T em perature (°C )
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
www.irf.com
3
IRLR/U3410
1400
1200
V
G S
, G ate-to-S ource V oltage (V )
V
GS
C
iss
C
rss
C
oss
=
=
=
=
0V ,
f = 1M H z
C
gs
+ C
gd
, C
ds
S H O R TE D
C
gd
C
ds
+ C
gd
15
I
D
= 9.0A
V
D S
= 8 0V
V
D S
= 5 0V
V
D S
= 2 0V
12
C , C apacitanc e (pF )
1000
C
is s
800
9
600
C
oss
400
6
C
rs s
200
3
0
1
10
100
A
0
0
10
20
FO R TE S T C IR C U IT
S E E FIG U R E 13
30
40
50
A
V
D S
, D rain-to-S ource V oltage (V )
Q
G
, Total G ate C harge (nC )
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
I
S D
, R everse D rain C urrent (A )
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R
D S (on)
T
J
= 175°C
I
D
, D rain C urrent (A )
100
10
10µ s
T
J
= 25°C
10
10 0µ s
1
0.4
0.6
0.8
1.0
V
G S
= 0V
1.2
A
1
1
T
C
= 25°C
T
J
= 175°C
S ingle P ulse
10
1m s
10m s
100
A
1000
1.4
V
S D
, S ource-to-D rain V oltage (V )
V
D S
, D rain-to-S ource V oltage (V )
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
www.irf.com
IRLR/U3410
20
V
DS
V
GS
R
D
D.U.T.
+
I
D
, Drain Current (A)
15
R
G
-
V
DD
5.0V
10
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
5
Fig 10a.
Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( ° C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.05
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
1
0.1
0.02
0.01
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
