ARA2000S23
CATV Reverse Amplifier with Step Attenuator
Advanced Product Information
Rev. 2
FEATURES
·
·
·
·
·
·
·
Low cost integrated monolithic GaAs
amplifier with step attenuator.
Attenuation Range: 0 58 dB, variable in
1 dB steps via 16 bit serial input.
Meets DOCSIS distortion requirements at
+60 dBmV
Low distortion & Low noise figure
Frequency range: 5 100 MHz
5 Volt operation
Programmable address allows multiple
parts to share 3 wire bus
APPLICATIONS
·
·
·
·
MCNS/DOCSIS Compliant Cable Modems
CATV Interactive Set-Top Box
Telephony over Cable Systems
Open Cable Set-Top Box
S23
28 PIN SSOP PACKAGE
Description
The ARA2000S23 is a GaAs IC designed to provide the reverse path amplification and output level control
functions in a CATV Set-Top Box or Cable Modem. It incorporates a digitally controlled precision step
attenuator that is preceded by an ultra low noise amplifier stage, and followed by an ultra-linear output driver
amplifier. This part is a balanced design that meets or exceeds the MCNS/DOCSIS requirement for
harmonic performance @ +60dBmV output levels while only requiring a single polarity +5V supply. Both the
input and output are matched to 75 ohms. The precision attenuator provides up to 58 dB of attenuation in 1
dB increments. The ARA2000S23 is supplied in a 28-pin SSOP package featuring a thermal heat slug on the
bottom of the package. Soldering this heat slug to the ground plane of the PC board ensures the lowest
possible thermal resistance for the device resulting in a long MTF.
Tx Enable/Disable
Gain Control
DAT
CLK
"Shutdown"
EN
CMOS IC
Upstream
QPSK/
16-QAM
Modulator
PA
~
PA
ARA
2000
Reverse Amp
Low Pass
Filter
Balun
ATTN
1/2/4/8/16/32 dB
PA
Low Pass
Filter
~
PA
Clock
Data
Microcontroller
w/Enet MAC
RAM
ROM
MAC
"Shutdown"
Clock
45 MHz IF
Data
Diplexer
Filter
54-860 MHz
Double
Conversion
Tuner
SAW
QAM
Receiver
w/FEC
10Base-T
Tranceiver
RJ45
Connector
Coax Input
Figure 1: Cable Modem or Interactive Set-Top Box Block Diagram
ARA2000S23
GaAs IC
Attn In
Amp Out
Amp In
Attn Out
Amp In
Amp Out
32 dB
16 dB
8 dB
4 dB
2 dB
1 dB
ISET 1
Control 1
Amp In
Amp Out
Attn In
EFET
ISET 2
EFET
Control 2
Amp Out
Amp In
Attn Out
32 dB
P5
16 dB
P4
8 dB
P3
4 dB
P2
2 dB
P1
1 dB
P0
Buffer
Clock
Buffer
2
Data Latch
2
8
8
8-Bit Shift Register
Die
Address 0
Data
2-Bit Shift
Register/
Address
8
Control Latch
Enable
2-Bit Shift
Register / Die ID
4-Bit Shift
Register/ Chip Sel
CMOS IC (Serial to Parallel Interface)
Die
Address 1
Figure 2: ARA 2000 Block Diagram
ABSOLUTE MAXIMUM RATINGS
PARAMETER
V
DD
(P INS 2,4,9,21,24)
V
RFIN
(P INS 5,8)
ATT
IN
(3,10) ATT
OUT
(19,26)V
I
SET
(P INS 7, 22)
RF Input Voltage (P INS
5,8
)*
PARAMETER
9
0 to -3
5
2
+ 60
- 55 to +200
260
5
0 to + 85
VD C
VD C
VD C
VD C
dB mV
°C
°C
S ec
°C
Storage T mperature
e
S olderi ng T mperature
e
S olderi ng Ti me
Operati ng C ase T mperature
e
2
ARA2000S23
ELECTRICAL CHARACTERISTICS (TYPICAL) (V
DD
=5 V
DC
, T
C
=25
°C)
PAR AMETER
Gai n
1
@ 10 MHz
Gai n Flatness
1
MIN
27.5
-
-
0.65
1.6
3.6
7.5
15.0
30.2
10 MHz
10 MHz
-
-
78
-
-
-
-
-
-
-
-
-
-
-
-
-
3
-
TYP
29.3
0.75
-0.006
0.83
1.70
3.75
7.75
15.40
30.75
-75
-60
-
68.5
3.0
-
-
65
75
-20
-5
75
-17
-15
5
5
-
48
MAX
30.5
-
-
1.00
2.05
4.0
8.0
15.8
31.3
-53
-53
-
-
4.0
-25.5
-40.8
-
-
-12
-
-
-12
-10
7
-
5
80
U N IT
dB
dB
dB/°c
C OMMEN TS
At 0dB attenuati on setti ng
5 to 42 MHz
Gai n Vari ati on Over Temp
Attenuati on Steps
1
1 dB
2 dB
4 dB
8 dB
16 dB
32 dB
dB
2
nd
Harmoni c D i storti on Level
2
3
rd
Harmoni c D i storti on Level
2
3
rd
Order Output Intercept Poi nt
1 dB Gai n C ompressi on Poi nt
Noi se Fi gure
1
dB c
dB c
dBmV
dBmV
dB
dBmV
at +60 dBmV
at +60 dBmV
Includes i nput balun loss
Any 3200 KHz bandwi dth
from 5-42 MHz
D i fference i n output si gnal
level between Tx enable /
di sable
Ouput Noi se Power
Acti ve/No Si gnal/Mi n Attn. Setti ng
Acti ve/No Si gnal/Max Attn. Setti ng
Isolati on i n Tx di sable mode @ 45 MHz
Input Impedance
1
Input Return Loss
1
Input Return Loss
1
Output Impedance
1
Output Return Loss
1
Output Return Loss
1
V
DD1
, V
DD2
(Pi ns 4, 9, 21, 24)
V
DD
D i gi tal (Pi n 2)
V
DD
C MOS (Pi n 11)
I
DD1
(Input Amp) (Pi ns 4 and 9)
dB
ohm
dB
dB
ohm
dB
dB
V
V
V
mA
Tx enabled
Tx di sabled
Tx enabled
Tx di sabled
Tx enabled
3
ARA2000S23
ELECTRICAL CHARACTERISTICS (TYPICAL) (V
DD
=5 V
DC
, T
C
=25
°C)
(Continued)
PAR AMETER
I
DD1
I
DD2
(Output Amp) (Pi ns 21 and 24)
I
DD2
I
DD
D i gi tal (Attenuator) (Pi n 2)
Power C onsumpti on
Power C onsumpti on
Attenuator Step Si ze
Gai n Flatness
1
MIN
-
-
-
-
-
-
0.6
-
-
-
58.6
TYP
2.4
77
3.7
9
0.67
75
-
1.5
-
4
60.3
MAX
6
120
9
15
1.08
150
1.4
-
100
7
U N IT
mA
mA
mA
mA
W
mW
dB
dB
mVp-p
-
C OMMEN TS
Tx di sabled
Tx enabled
Tx di sabled
Tx enabled
Tx di sabled
5 - 65 MHz
At 0 db Attenuator Setti ng
At 24 db Attenuator Setti ng
Output Voltage Transi ent
1
Tx enable/di sable
Maxi mum Attenuati on
Notes:
1. As measured in ANADIGICS test fixture
2. At +60 dBmV output level into 75 ohm load
ARA2000
Attenuation Level vs C ontrol Word
64
60
56
52
48
44
Attenuation (dB)
40
36
32
28
24
20
16
12
8
4
0
0
4
8
12
16
20
24
28
32
Control W ord
36
40
44
48
52
56
4
ARA2000S23
Gain & Noise Figure vs Frequency
35
8
30
7
25
6
Gain (dB)
20
5
15
4
10
3
5
10
20
30
40
50
60
70
80
90
2
100
Frequency (MHz)
Gain
Noise Figure
Gain & Noise Figure vs V
DD
35
6
32
5
GAIN (dB)
29
4
26
3
23
Measured @ 30 MHz
20
3
4
5
6
7
2
1
V
DD
( Volts )
Gain
Noise Figure
GAIN & Noise Figure vs Temperature
35
6
32
5
GAIN (dB)
29
4
26
3
23
2
Measured @ 30 MHz
20
-40
-25
-10
5
20
35
50
65
80
1
Temperature (C
o
)
Gain
Noise Figure
NF (dB)
NF (dB)
NF (dB)
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
