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HD14702883B

产品描述2.4576MHz, OTHER CLOCK GENERATOR, CDIP16, CERDIP-16
产品类别微控制器和处理器    时钟发生器   
文件大小194KB,共8页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 全文预览

HD14702883B概述

2.4576MHz, OTHER CLOCK GENERATOR, CDIP16, CERDIP-16

HD14702883B规格参数

参数名称属性值
厂商名称Renesas(瑞萨电子)
零件包装代码DIP
包装说明CERDIP-16
针数16
Reach Compliance Codeunknown
ECCN代码EAR99
Is SamacsysN
JESD-30 代码R-GDIP-T16
端子数量16
最高工作温度125 °C
最低工作温度-55 °C
最大输出时钟频率2.4576 MHz
封装主体材料CERAMIC, GLASS-SEALED
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
主时钟/晶体标称频率2.4576 MHz
认证状态Not Qualified
筛选级别MIL-STD-883 Class B
座面最大高度5.08 mm
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
宽度7.62 mm
uPs/uCs/外围集成电路类型CLOCK GENERATOR, OTHER
Base Number Matches1

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TM
HD-4702/883
CMOS Programmable Bit Rate Generator
Description
The HD-4702/883 Bit Rate Generator provides the
necessary clock signals for digital data transmission sys-
tems, such as a UART. It generates 13 commonly used bit
rates using an on-chip crystal oscillator or an external input.
For conventional operation generating 16 output clock
pulses per bit period, the input clock frequency must be
2.4576MHz (i.e., 9600 Baud x 16 x 16, since there is an
internal
÷
16 prescaler). A lower input frequency will result in
a proportionally lower output frequency.
The HD-4702/883 can provide multi-channel operation with
a minimum of external logic by having the clock frequency
C
O
and the
÷
8 prescaler outputs Q
0
, Q
1
, Q
2
available
externally. All signals have a 50% duty cycle except 1800
Baud, which has less than 0.39% distortion.
The four rate select inputs (S
0
-S
3
) select which bit rate is at
the output (Z). See Truth Table for Rate Select Inputs for
select code and output bit rate. Two of the 16 select codes
for the HD-4702/883 do not select an internally generated
frequency, but select an input into which the user can feed
either a different frequency, or a static level (High or Low) to
generate “ZERO BAUD”.
The bit rates most commonly used in modern data terminals
(110,150, 300,1200, 2400 Baud) require that no more than
one input be grounded for the HD-4702/883, which is easily
achieved with a single 5-position switch.
The HD-4702/883 has an initialization circuit which
generates a master reset for the scan counter. This signal is
derived from a digital differentiator that senses the first high
level on the C
P
input after the E
CP
input goes low. When
E
CP
is high, selecting the crystal input, C
P
must be low. A
high level on C
P
would apply a continuous reset. See Clock
Modes and Initialization below.
June 1998
Features
• This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1. 2. 1.
• HD-4702/883 Provides 13 Commonly Used Bit Rates
• Uses a 2.4576MHz Crystal/Input for Standard
Frequency Output (16 Times Bit Rate)
• Low Power Dissipation
• Conforms to ElA RS-404
• One HD-4702/883 Controls up to Eight Transmission
Channels
• Initialization Circuit Facilitates Diagnostic Fault
Isolation
• On-Chip Input Pull-Up Circuit
Ordering Information
PART
NUMBER
HD1-4702/883
TEMPERATURE
RANGE (
o
C)
-55 to 125
PACKAGE
CERDIP
PKG. NO.
F16.3
Pinout
HD-4702/883 (CERDIP)
TOP VIEW
Q
0
Q
1
Q
2
E
CP
C
P
O
X
I
X
GND
1
2
3
4
5
6
7
8
16 V
CC
15 I
M
14 S
0
13 S
1
12 S
2
11 S
3
10 Z
9
C
O
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
FN2955.2
1

 
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