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74VHCU04 Hex Inverter
July 1993
Revised February 2005
74VHCU04
Hex Inverter
General Description
The VHCU04 is an advanced high speed CMOS Inverter
fabricated with silicon gate CMOS technology. It achieves
the high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation.
Since the internal circuit is composed of a single stage
inverter, it can be used in analog applications such as crys-
tal oscillators. An input protection circuit ensures that 0V to
7V can be applied to the input pins without regard to the
supply voltage. This device can be used to interface 5V to
3V systems and two supply systems such as battery
backup. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Features
s
High Speed: t
PD
3.5 ns (typ) at V
CC
V
NIL
5V
25
q
C
s
Low Power Dissipation: I
CC
s
High Noise Immunity: V
NIH
s
Low Noise: V
OLP
2
P
A (Max) @ T
A
28% V
CC
(Min)
s
Power down protection is provided on all inputs
0.8V (Max)
s
Pin and Function Compatible with 74HCU04
Ordering Code:
Order Number
74VHCU04M
74VHCU04MX_NL
(Note 1)
74VHCU04SJ
74VHCU04MTC
74VHCU04MTCX_NL
(Note 1)
74VHCU04N
Package
Number
M14A
M14A
M14D
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS011626
www.fairchildsemi.com
74VHCU04
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
O
n
Description
Inputs
Outputs
Truth Table
A
L
H
O
H
L
www.fairchildsemi.com
2
74VHCU04
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Input Diode Current (I
IK
)
Output Diode Current (I
OK
)
DC Output Current (I
OUT
)
DC V
CC
/GND Current (I
CC
)
Storage Temperature (T
STG
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
q
C
0.5V to
7.0V
0.5V to
7.0V
0.5V to V
CC
0.5V
20 mA
r
20 mA
r
25 mA
r
50 mA
65
q
C to
150
q
C
Recommended Operating
Conditions
(Note 3)
Supply Voltage (V
CC
)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Operating Temperature (T
OPR
)
2.0V to
5.5V
0V to
5.5V
0V to V
CC
40
q
C to
85
q
C
Note 2:
Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 3:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level
Input Voltage
LOW Level
Input Voltage
HIGH Level
Output Voltage
V
CC
(V)
2.0
3.0
5.5
2.0
3.0
5.5
2.0
3.0
4.5
3.0
4.5
V
OL
LOW Level
Output Voltage
2.0
3.0
4.5
3.0
4.5
I
IN
I
CC
Input Leakage Current
Quiescent Supply Current
0
5.5
5.5
1.8
2.7
4.0
2.58
3.94
0.0
0.0
0.0
0.2
0.3
0.5
0.36
0.36
2.0
3.0
4.5
Min
1.70
0.8 V
CC
0.30
0.20 V
CC
1.8
2.7
4.0
2.48
3.80
0.2
0.3
0.5
0.44
0.44
V
V
IN
V
IN
V
IN
V
CC
I
OL
I
OL
V
CC
or GND
4 mA
8 mA
V
V
V
IN
V
IN
GND
V
IH
I
OH
I
OH
I
OL
V
T
A
25
q
C
Typ
Max
T
A
40
q
C to
85
q
C
Max
Units
Conditions
Min
1.70
0.8 V
CC
V
0.30
0.20 V
CC
V
V
IN
V
IL
I
OH
50
P
A
4 mA
8 mA
50
P
A
r
0.1
2.0
r
1.0
20.0
P
A
P
A
5.5V or GND
3
www.fairchildsemi.com
74VHCU04
Noise Characteristics
Symbol
V
OLP
(Note 4)
V
OLV
(Note 4)
V
IHD
(Note 4)
V
ILD
(Note 4)
Parameter
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
5.0
1.0
V
C
L
50 pF
5.0
4.0
V
C
L
50 pF
5.0
V
CC
(V)
5.0
T
A
Typ
0.5
25
q
C
Limits
0.8
Units
V
V
C
L
C
L
50 pF
50 pF
Conditions
0.5
0.8
Note 4:
Parameter guaranteed by design.
AC Electrical Characteristics
Symbol
t
PHL
t
PLH
5.0
r
0.5
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
Note 5:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr.) C
PD
* V
CC
* f
IN
I
CC
/6 (per gate).
Parameter
Propagation Delay
V
CC
(V)
3.3
r
0.3
Min
T
A
25
q
C
Typ
5.0
7.5
3.5
5.0
5
9
Max
8.9
11.4
5.5
7.0
10
T
A
40
q
C to
85
q
C
Max
10.5
13.0
6.5
8.0
10
Min
1.0
1.0
1.0
1.0
Units
ns
ns
pF
pF
C
L
C
L
C
L
C
L
V
CC
Conditions
15 pF
50 pF
15 pF
50 pF
Open
(Note 5)
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4
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