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71V416YS15BEG1

产品描述Standard SRAM, 256KX16, 15ns, CMOS, PBGA48
产品类别存储   
文件大小138KB,共9页
制造商IDT (Integrated Device Technology)
标准  
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71V416YS15BEG1概述

Standard SRAM, 256KX16, 15ns, CMOS, PBGA48

71V416YS15BEG1规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
包装说明BGA, BGA48,6X8,30
Reach Compliance Codecompliant
最长访问时间15 ns
I/O 类型COMMON
JESD-30 代码S-PBGA-B48
JESD-609代码e1
内存密度4194304 bit
内存集成电路类型STANDARD SRAM
内存宽度16
湿度敏感等级3
功能数量1
端子数量48
字数262144 words
字数代码256000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-40 °C
组织256KX16
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码BGA
封装等效代码BGA48,6X8,30
封装形状SQUARE
封装形式GRID ARRAY
并行/串行PARALLEL
峰值回流温度(摄氏度)260
电源3.3 V
认证状态Not Qualified
最大待机电流0.02 A
最小待机电流3 V
最大压摆率0.125 mA
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层Tin/Silver/Copper (Sn/Ag/Cu)
端子形式BALL
端子节距0.75 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间30
Base Number Matches1

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3.3V CMOS Static RAM
for Automotive Applications
4 Meg (256K x 16-Bit)
Features
256K x 16 advanced high-speed CMOS Static RAM
JEDEC Center Power / GND pinout for reduced noise.
Equal access and cycle times
– Automotive: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin, 400 mil plastic SOJ package and a 44-
pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
IDT71V416YS
IDT71V416YL
Description
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs and automotive applications.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
x
x
x
x
x
x
x
x
x
Functional Block Diagram
Output
Enable
Buffer
OE
A0 - A17
Address
Buffers
Row / Column
Decoders
8
CS
Chip
Select
Buffer
8
Sense
Amps
and
Write
Drivers
High
Byte
Output
Buffer
High
Byte
Write
Buffer
8
I/O 15
8
I/O 8
4,194,304-bit
Memory
Array
WE
Write
Enable
Buffer
16
8
Low
Byte
Output
Buffer
Low
Byte
Write
Buffer
8
I/O 7
8
8
I/O 0
BHE
Byte
Enable
Buffers
BLE
6817 drw 01
DECEMBER 2004
1
©2004 Integrated Device Technology, Inc.
DSC-6817/00

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