INTEGRATED CIRCUITS
CBT6820
20-bit bus switch with precharged outputs
and Schottky undershoot protection for
live insertion
Product specification
Supersedes data of 1999 Apr 05
2000 Jun 19
Philips
Semiconductors
Philips Semiconductors
Product specification
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
CBT6820
FEATURES
•
TTL compatible inputs and outputs
•
5
Ω
switch connection between two port A and port B
•
Thin shrink small outline (TSSOP)
•
Undershoot protection included to prevent shoot through level
changes
PIN CONFIGURATION
BIASV 1
1A1 2
1A2 3
1A3 4
1A4 5
1A5 6
1A6 7
GND 8
1A7 9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
•
Bias voltage pre-charges the outputs to minimize signal distortion
during live insertion
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
The CBT6820 provides twenty bits of high-speed TTL-compatible bus
switching. The low on-state resistance of the switch allows
bi-directional connections to be made while adding near-zero
propagation delay. The device also precharges the B port to a
user-selectable bias voltage (BIASV) to minimize live-insertion noise.
The device is organized as two 10-bit switch with individual enable
(OE) input. When OE is low, the switch is on and port A is
connected to port B. When OE is high, the switch between port A
and port B is open and the B port is precharged to BIASV through
the equivalent of a 10 kΩ resistor.
Special clamp circuitry and Schottky diode clamps to ground are
used to prevent an under voltage on the A side (Vin
<
GND) from
causing the B side precharge voltage to drop below the ‘‘1” state.
1A8 10
1A9 11
1A10 12
2A1 13
2A2 14
V
CC
15
2A3 16
GND 17
2A4 18
2A5 19
2A6 20
2A7 21
2A8 22
2A9 23
2A10 24
SA00520
QUICK REFERENCE DATA
SYMBOL
t
PLH
/t
PHL
C
IN
C
I/O
PARAMETER
Propagation delay
An to Bn or Bn to An
Input capacitance
Input/output capacitance
Outputs disabled; V
O
= 0 V or V
CC
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50 pF, V
CC
= 5 V
TYPICAL
0.25
4.5
9.5
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
48-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
ORDER CODE
CBT6820 DGG
DWG NUMBER
SOT362–1
2000 Jun 19
2
853–2152 23904
Philips Semiconductors
Product specification
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
CBT6820
PIN DESCRIPTION
PIN NUMBER
1
2, 3, 4, 5, 6,
7, 9, 10, 11,12
8, 17, 32, 41
13, 14, 16, 18, 19,
20, 21, 22, 23, 24
15
35, 34, 33, 31, 30,
29, 28, 27, 26, 25
46, 45, 44, 43, 42,
40, 39, 38, 37, 36
48, 47
SYMBOL
BIASV
1A1–1A10
GND
2A1–2A10
V
CC
2B1–2B10
1B1–1B10
1OE, 2OE
NAME AND FUNCTION
Precharge bias voltage input
Port 1A1 to Port 1A10
Ground (V)
Port 2A1 to Port 2A10
Positive supply voltage
Port 2B1 to Port 2B10
Port 1B1 to Port 1B10
Switch enables
LOGIC SYMBOL
1
BIASV
2, 13
xA1
46, 35
xB1
12, 24
xA10
36, 25
xB10
FUNCTION TABLE
OE
L
H
H
H = High voltage level
L = Low voltage level
Z = High impedance “off ” state
STATE
48, 47
A Port = B Port
A Port = Z
xOE
where x = 1 – 2
B Port = BIASV
SA00506
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
I
IK
V
I
I
SW
V
BIASV
T
stg
øJA
PARAMETER
DC supply voltage
DC clamp diode current
DC input voltage
1
DC continuous channel current
DC bias voltage
Storage temperature range
Plastic thin shrink small outline package
(TSSOP)
V
O
= 0 to V
CC
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–50
–0.5 to +7.0
±128
–0.5 to +7.0
–65 to 150
104
UNIT
V
mA
V
mA
V
°C
°C/W
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
BIASV
V
IH
V
IL
T
amb
DC supply voltage
DC supply voltage
High-level input voltage (control pin)
Low-level Input voltage (control pin)
Operating free-air temperature range
–40
PARAMETER
Min
4.0
1.3
2.0
0.8
+85
Max
5.5
V
CC
V
V
V
V
°C
UNIT
2000 Jun 19
3
Philips Semiconductors
Product specification
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
CBT6820
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= –40°C to +85°C
Min
V
IK
I
I
I
O
I
CC
∆I
CC
C
I
C
O(OFF)
r
on3
Input clamp voltage
Input leakage current (control pin)
Output bias current (B pins)
Quiescent supply current
Control pins
2
Input capacitance per OE pin
Capacitance per port (OFF-state)
V
CC
= 4.5V; I
I
= –18mA
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 4.5V; BiasV = 2.4V; V
O
= 0, OE = V
CC
V
CC
= 5.5V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5V, one input at 3.4V,
other inputs at V
CC
or GND
V
I
= 3V or 0
V
O
= 3V or 0; switch off
V
CC
= 4.5V; V
I
= 0V; I
I
= 64mA
On-resistance
V
CC
= 4.5V; V
I
= 0V; I
I
= 30mA
V
CC
= 4.5V; V
I
= 2.4V; I
I
= –15mA
V
P
I
USP
Pass voltage
Undershoot static current
protection
4
V
IN
= V
CC
= 4.5V; I
out
= –100µA
V
CC
= 5.0V, V
Bias
= V
CC
I
B
= –5µA, V
B
≥
3.0V
3.4
4.5
9.5
5
5
10
3.6
–10
7
7
15
3.9
V
mA
Ω
Typ
1
Max
–1.2
±5
–0.25
2.5
2.5
V
µA
mA
mA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at VCC = 5V, TA = 25 C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On–state resistance is
determined by the lowest voltage of the two (A or B) terminals.
4. Force I
USP
, measure V
B
≥
3V
2000 Jun 19
4
Philips Semiconductors
Product specification
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
AC CHARACTERISTICS FOR V
CC
= 5.0V
±0.5V
RANGE
GND = 0V; t
r
= t
f
≤
2.5ns; C
L
= 50pF.
SYMBOL
t
pd
t
PZH
t
PZL
t
PHZ
t
PLZ
LIMITS
PARAMETER
Propagation delay; An to Bn; Bn to An
2
3-State output enable time
OE to An; OE to Bn; BIASV = GND
3-State output enable time
OE to An; OE to Bn; BIASV = 3.0V
3-State output enable time
OE to An; OE to Bn; BIASV = GND
3-State output enable time
OE to An; OE to Bn; BIASV = 3.0V
WAVEFORM
MIN
1
2
2
2
2
1.3
1.4
1.7
2.8
3.1
2.9
2.8
4.4
T
amb
= –40 to +85°C
TYP
1
CBT6820
UNIT
ns
ns
ns
ns
ns
MAX
0.25
5.3
4.6
4.5
6.6
NOTE:
1. All typical values are measured at T
amb
= 25°C and V
CC
= 5.0V
2. Warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON-state resistance of the
switch and a load capacitance of 50pF, when driven by an ideal voltage source (zero output impedance)
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
3V
1.5V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5V
OUTPUT
V
OL
1.5V
1.5V
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
SA00028
Waveform 1. Waveforms Showing the Input (An) to Output (Bn)
Propagation Delays
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
3V
Output Control
(Low-level
enabling
t
PZL
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
1.5 V
1.5 V
0V
3.5V
1.5 V
t
PHZ
V
OH
– 0.3V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00012
t
PLZ
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR
≤
10 MHz, Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per
measurement.
V
OL
+ 0.3V
V
OL
V
OH
SA00029
Waveform 2. Waveforms Showing the 3-State Output Enable
and Disable Times
2000 Jun 19
5
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