EEPROM
Austin Semiconductor, Inc.
AS58C1001
End
Of
Life
AS58C1001
Rev. 5.0 7/02
PLEASE NOTE:
An EOL notice was
issued on this product in
2001. However, ASI has a
large amount of die inventory
available. For assistance,
please contact your local
sales representative.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
EEPROM
Austin Semiconductor, Inc.
128K x 8 EEPROM
EEPROM Memory
AVAILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-38267
!
MIL-STD-883
!
AS58C1001
PIN ASSIGNMENT
(Top View)
32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ),
32-Pin SOP (DG)
RDY/BUSY\
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
RES\
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
FEATURES
!
High speed: 150, 200, and 250ns
!
Data Retention: 10 Years
!
Low power dissipation, active current (20mW/MHz (TYP)),
standby current (100µW(MAX))
!
Single +5V (+10%) power supply
!
Data Polling and Ready/Busy Signals
!
Erase/Write Endurance (10,000 cycles in a page mode)
!
Software Data protection Algorithm
!
Data Protection Circuitry during power on/off
!
Hardware Data Protection with RES pin
!
Automatic Programming:
Automatic Page Write: 10ms (MAX)
128 Byte page size
OPTIONS
!
!
!
Timing
150ns access
200ns access
250ns access
Packages
Ceramic LCC
Ceramic Flat Pack
Radiation Shielded Ceramic FP*
Ceramic SOJ
Plastic SOP
Operating Temperature Ranges
-Military (-55
o
C to +125
o
C)
-Industrial (-40
o
C to +85
o
C)
End
Of
Life
32-Pin LCC (ECA)
A12
A15
A16
NC
Vcc
WE\
NC
MARKINGS
-15
-20
-25
4 3 2 1 32 31 30
ECA
F
SF
DCJ
DG
No. 208
No. 306
No. 305
No. 508
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
14 15 16 17 18 19 20
I/O 6
I/O 5
I/O 4
I/O 3
Vss
I/O 2
I/O 1
XT
IT
*NOTE:
Package lid is connected to ground (Vss).
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS
Electrically Erasable Programmable Read Only Memory (EEPROM)
organized as 131, 072 x 8 bits. The AS58C1001 is capable or in
system electrical Byte and Page reprogrammability.
The AS58C1001 achieves high speed access, low power
consumption, and a high level of reliability by employing advanced
MNOS memory technology and CMOS process and circuitry
technology and CMOS process and circuitry technology.
This device has a 128-Byte Page Programming function to make its
erase and write operations faster. The AS58C1001 features Data
Polling and a Ready/Busy signal to indicate completion of erase and
programming operations.
AS58C1001
Rev. 5.0 7/02
This EEPROM provides several levels of data protection.
Hardware data protection is provided with the RES pin, in addition to
noise protection on the WE signal and write inhibit during power on
and off. Software data protection is implemented using JEDEC
Optional Standard algorithm.
The AS58C1001 is designed for high reliability in the most
demanding applications. Data retention is specified for 10 years and
erase/write endurance is guaranteed to a minimum of 10,000 cycles in
the Page Mode.
For more products and information
please visit our web site at
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
EEPROM
Austin Semiconductor, Inc.
AS58C1001
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
High Voltage Generator
I/O0
I/O7
Ready/Busy
End
Of
Life
CE\
WE\
RES\
Control Logic and Timing
A0
A6
Y Decoder
Y Gating
Address
Buffer and
Latch
X Decoder
Memory Array
A7
A16
Data Latch
OE\
I/O Buffer
and
Input Latch
MODE SELECTION
MODE
READ
STANDBY
WRITE
DESELECT
WRITE
INHIBIT
DATA
POLLING
PROGRAM
AS58C1001
Rev. 5.0 7/02
CE\
V
IL
V
IH
V
IL
V
IL
X
X
V
IL
X
OE\
V
IL
X
V
IH
V
IH
X
V
IL
V
IL
X
WE\
V
IH
X
V
IL
V
IH
V
IH
X
V
IH
X
RES\
V
H
X
V
H
V
H
X
X
V
H
V
IL
RDY/BUSY\
High-Z
High-Z
High-Z
High-Z
---
---
V
OL
High-Z
I/O
D
OUT
High-Z
D
IN
High-Z
---
---
Data Out
(I/O7)
High-Z
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
EEPROM
Austin Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
AUTOMATIC PAGE WRITE
The Page Write feature allows 1 to 128 Bytes of data to be
written into the EEPROM in a single cycle and allows the un-
defined data within 128 Bytes to be written corresponding to
the undefined address (A
0
to A
6
). Loading the first Byte of
data, the data load window of 30µs opens for the second. In the
same manner each additional Byte of data can be loaded within
30µs. In case CE\ and WE\ are kept high for 100µs after data
input, the EEPROM enters erase and write automatically and
only the input data can be written into the EEPROM. In Page
mode the data can be written and accessed 10
4
times per page,
and in Byte mode 10
3
times per Byte.
AS58C1001
DATA PROTECTION
To protect the data during operation and power on/off, the
AS58C1001 has:
1. Data protection against Noise on Control Pins (CE\, OE\,
WE\) during Operation. During readout or standby, noise on
the control pins may act as a trigger and turn the EEPROM to
programming mode by mistake. To prevent this phenomenon,
the AS58C1001 has a noise cancellation function that cuts noise
if its width is 20ns or less in programming mode. Be careful not
to allow noise of a width of more than 20ns on the control pins.
DATA\ POLLING
Data\ Polling allows the status of the EEPROM to be deter-
mined. If the EEPROM is set to Read mode during a Write
cycle, and inversion of the last Byte of data to be loaded out-
puts from I/O, to indicate that the EEPROM is performing a
Write operation.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act as
a trigger with a WE\ pulse of less than 20ns.
(2) Write inhibit: Holding OE\ low, WE\ high or CE\ high,
inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling
edge of WE\ or CE\, and data is latched by the rising edge of
WE\ or CE\.
End
Of
Life
WRITE/ERASE ENDURANCE AND
DATA RETENTION
The endurance with page programming is 10
4
cycles (1%
cumulative failure rate) and the data retention time is more than
10 years when a device is programmed less than 10
4
cycles.
AS58C1001
Rev. 5.0 7/02
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
EEPROM
Austin Semiconductor, Inc.
(EXAMPLE)
AS58C1001
Vcc
FUNCTIONAL DESCRIPTION (continued)
DATA PROTECTION (continued)
2. Data protection at Vcc on/off.
When RES\ is low, the EEPROM cannot be erased and
programmed. Therefore, data can be protected by keeping
RES\ low when Vcc is switched. RES\ should be high during
programming because it does not provide a latch function.
When Vcc is turned on or off, noise on the control pins
generated by external circuits (CPU, etc.) may turn the
EEPROM to programming mode by mistake. To prevent
this unintentional programming, the EEPROM must be kept
in an unprogrammable, standby or readout state by using a
CPU reset signal to RES\ pin.
In addition, when RES\ is kept high at Vcc on/off timing,
the input level of control pins (CE\, OE\, WE\) must be held
as CE\=Vcc or OE\=LOW or WE\=Vcc level.
3. Software Data Protection
To protect against unintentional programming caused by
noise generated by external circuits, AS58C1001 has a
Software data protection function. To initate Software data
protection mode, 3 bytes of data must be input, followed by
a dummy write cycle of any address and any data byte. This
exact sequence switches the device into protection mode.
End
Of
Life
RES\
*unprogrammable
*unprogrammable
Write Address
5555
Write Data
(Normal Data Input)
AA
55
2AAA
5555
A0
The Software data protection mode can be cancelled by
inputting the following 6 Bytes. This changes the AS58C1001
to the Non-Protection mode, for normal operation.
Address
5555
2AAA
5555
5555
2AAA
5555
Data
AA
55
80
AA
55
20
AS58C1001
Rev. 5.0 7/02
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
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