PD - 97310
Applications
l
High Efficiency Synchronous Rectification in
SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
IRFB3806PbF
IRFS3806PbF
IRFSL3806PbF
HEXFET
®
Power MOSFET
D
Benefits
l
Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt
Capability
S
V
DSS
R
DS(on)
typ.
max.
I
D
D
60V
12.6m
Ω
15.8m
Ω
43A
D
D
S
G
D
G
S
G
S
D
TO-220AB
IRFB3806PbF
D
2
Pak
IRFS3806PbF
TO-262
IRFSL3806PbF
G
D
S
Gate
Drain
Max.
43
31
170
71
0.47
± 20
24
-55 to + 175
300
10lbxin (1.1Nxm)
Source
Units
A
W
W/°C
V
V/ns
°C
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
c
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
e
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
d
Avalanche Current
c
Repetitive Avalanche Energy
f
73
25
7.1
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
R
θJA
Parameter
Junction-to-Case
j
Case-to-Sink, Flat Greased Surface, TO-220
Junction-to-Ambient, TO-220
ij
Junction-to-Ambient (PCB Mount) , D Pak
ij
2
Typ.
–––
0.50
–––
–––
Max.
2.12
–––
62
40
Units
°C/W
www.irf.com
1
02/29/08
IRFB/S/SL3806PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
60
––– –––
––– 0.075 –––
––– 12.6 15.8
2.0
–––
4.0
––– –––
20
––– ––– 250
––– ––– 100
––– ––– -100
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 5mAc
mΩ V
GS
= 10V, I
D
= 25A
f
V V
DS
= V
GS
, I
D
= 50µA
µA V
DS
= 60V, V
GS
= 0V
V
DS
= 48V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
R
G(int)
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Internal Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
41
–––
–––
–––
–––
–––
Conditions
V
DS
= 10V, I
D
= 25A
I
D
= 25A
V
DS
= 30V
V
GS
= 10V
f
I
D
= 25A, V
DS
=0V, V
GS
= 10V
–––
22
5.0
6.3
28.3
0.79
6.3
40
49
47
1150
130
67
190
230
–––
30
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Ω
–––
–––
–––
–––
–––
–––
–––
Effective Output Capacitance (Energy Related)h –––
–––
Effective Output Capacitance (Time Related)g
ns
pF
V
DD
= 39V
I
D
= 25A
R
G
= 20Ω
V
GS
= 10V
f
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
h
V
GS
= 0V, V
DS
= 0V to 60V
g
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
c
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
43
170
A
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
–––
22
33
ns
–––
26
39
–––
17
26
nC
T
J
= 125°C
–––
24
36
–––
1.4
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 25A, V
GS
= 0V
f
V
R
= 51V,
T
J
= 25°C
I
F
= 25A
T
J
= 125°C
di/dt = 100A/µs
f
T
J
= 25°C
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.23mH
R
G
= 25Ω, I
AS
= 25A, V
GS
=10V. Part not recommended for
use above this value.
I
SD
≤
25A, di/dt
≤
1580A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
2
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IRFB/S/SL3806PbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
4.5V
10
10
4.5V
≤
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
1
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
Fig 2.
Typical Output Characteristics
2.5
ID = 25A
VGS = 10V
2.0
(Normalized)
ID, Drain-to-Source Current (A)
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
≤
60µs PULSE WIDTH
0.1
2
3
4
5
6
7
8
9
1.5
1.0
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
10000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 25A
VGS , Gate-to-Source Voltage (V)
10.0
VDS= 48V
VDS= 30V
VDS= 12V
C, Capacitance (pF)
1000
Ciss
Coss
Crss
8.0
6.0
100
4.0
2.0
10
1
10
VDS, Drain-to-Source Voltage (V)
100
0.0
0
5
10
15
20
25
Q G , Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB/S/SL3806PbF
1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 175°C
10
T J = 25°C
100
1msec
100µsec
10
10msec
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
VSD, Source-to-Drain Voltage (V)
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
VDS, Drain-to-Source Voltage (V)
100
DC
Fig 7.
Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
45
40
35
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
80
Id = 5mA
75
30
25
20
15
10
5
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
70
65
60
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
0.4
0.3
0.3
Energy (µJ)
Fig 10.
Drain-to-Source Breakdown Voltage
300
EAS , Single Pulse Avalanche Energy (mJ)
250
ID
TOP
2.8A
5.1A
BOTTOM 25A
200
0.2
0.2
0.1
0.1
0.0
-10
0
10
20
30
40
50
60
70
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
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IRFB/S/SL3806PbF
10
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
τ
1
0.1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
τ
C
τ
τ
3
Ri (°C/W)
τi
(sec)
0.6086 0.00026
0.9926
0.5203
0.001228
0.00812
τ
2
0.01
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
0.0001
Ci=
τi/Ri
Ci
τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
0.001
1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
0.01
Avalanche Current (A)
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆
Tj = 150°C and
Tstart =25°C (Single Pulse)
1.0E-03
tav (sec)
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
80
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 25A
60
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
EAR , Avalanche Energy (mJ)
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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