Austin Semiconductor, Inc.
512K x 32 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
•
•
•
•
•
•
•
•
•
AS8S512K32
& AS8S512K32A
PIN ASSIGNMENT
(Top View)
68 Lead CQFP (Q)
Military SMD Pinout Option
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
SRAM
SMD 5962-94611 (Military Pinout)
MIL-STD-883
Operation with single 5V supply
High speed: 12, 15, 17, 20, 25 and 35ns
Built in decoupling caps for low noise
Organized as 512Kx32 , byte selectable
Low power CMOS
TTL Compatible Inputs and Outputs
Future offerings
3.3V Power Supply
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
FEATURES
•
Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
Industrial (-40
o
C to +85
o
C)
•
Timing
12ns
15ns
17ns
20ns
25ns
35ns
45ns
55ns
• Package
Ceramic Quad Flatpack
Ceramic Quad Flatpack
Pin Grid Array
• Low Power Data Retention Mode
• Pinout
Military
Commercial
XT
IT
68 Lead CQFP
Commercial Pinout Option (A)
I/O 16
A18
A17
CS4\
CS3\
CS2\
CS1\
NC
Vcc
NC
NC
OE\
WE\
A16
A15
A14
I/O 15
-12
-15
-17
-20
-25
-35
-45
-55
L
(no indicator)
A*
CS
CS
*(available with Q
DESCRIPTION
GENERAL
package only)
The Austin Semiconductor, Inc. AS8S512K32 and
AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as
512Kx32 bits. These devices achieve high speed access, low power
consumption and high reliability by employing advanced CMOS
memory technology.
This military temperature grade product is ideally suited for
military and space applications.
CS
For more products and information
please visit our web site at
www.austinsemiconductor.com
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
I/O 31
A6
A5
A4
A3
A2
A1
A0
Vcc
A13
A12
A11
A10
A9
A8
A7
I/O 0
Q
Q1
P
No.904
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
No.702
I/O17
I/O18
I/O19
Vss
I/O20
I/O21
I/O22
I/O23
Vcc
I/O24
I/O25
I/O26
I/O27
Vss
I/O28
I/O29
I/O30
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
A17
WE2\
WE3\
WE4\
A18
NC
NC
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
OPTIONS
MARKINGS
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
NC
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
I/O 14
I/O 13
I/O 12
Vss
I/O 11
I/O 10
I/O 9
I/O 8
Vcc
I/O 7
I/O 6
I/O 5
I/O 4
Vss
I/O 3
I/O 2
I/O 1
66 Lead PGA (P)
Military SMD Pinout
\
CS
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
SRAM
CS
CS\4
CS4\
CS
CS3\
CS\3
512K x 8
M3
512K x 8
M2
CS
I/O 24 - I/O 31
CS\2
CS2\
I/O 16 - I/O 23
CS
512K x 8
M1
CS\1
CS1\
WE\
OE\
A0 - A18
I/O 8 - I/O 15
512K x 8
M0
I/O 0 - I/O 7
MILITARY PINOUT/BLOCK DIAGRAM
COMMERCIAL PINOUT/BLOCK DIAGRAM
TRUTH TABLE
MODE
Read
Write(2)
Standby
OE\
L
X
X
CE\
CS
L
L
H
WE\
H
L
X
I/O
D
OUT
D
IN
High Z
POWER
ACTIVE
ACTIVE
STANDBY
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V
Storage Temperature............................................-65°C to +150°C
Short Circuit Output Current(per I/O).................................20mA
Voltage on Any Pin Relative to Vss....................-.5V to Vcc+1V
Maximum Junction Temperature**...................................+150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
AS8S512K32
& AS8S512K32A
SRAM
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See the Application
Information section at the end of this datasheet for more infor-
mation.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C and -40
o
C to +85
o
C; Vcc = 5V +10%)
DESCRIPTION
Input High (logic 1) Voltage
Input Low (logic 1) Voltage
Input Leakage Current
ADD,OE
Input Leakage Current
WE, CE
Output Leakage Current
I/O
Output High Voltage
Output Low Voltage
Supply Voltage
CONDITIONS
SYMBOL
V
IH
V
IL
0V<V
IN
<V
CC
Output(s) Disabled
0V<V
OUT
<V
CC
I
OH
= 4.0mA
I
OL
= 8.0mA
I
LI1
I
LI2
ILO
V
OH
V
OL
V
CC
4.5
MIN
2.2
-0.5
-10
-10
-10
2.4
0.4
5.5
MAX UNITS NOTES
V
CC
+.5
V
1
0.8
10
10
10
V
µA
µA
µA
V
V
V
1
1
1
1,2
DESCRIPTION
CONDITIONS
SYMBOL -12
Icc
250
-15
200
-17
700
MAX
-20 -25
650
600
-35
570
-45
570
-55 UNITS NOTES
550
mA
3,13
CS\<VIL; VCC = MAX
Power Supply
f = MAX = 1/ tRC (MIN)
Current: Operating
Outputs Open
CS\>VIH; VCC = MAX
Power Supply
f = MAX = 1/ tRC (MIN)
Current: Standby
Outputs Open
I
SBT1
80
80
240
240
190
190
150
150
mA
3, 13
CMOS Standby
VIN = VCC - 0.2V, or
VSS +0.2V
VCC=Max; f = 0Hz
I
SBT2
80
80
80
80
80
80
80
80
mA
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
Austin Semiconductor, Inc.
CAPACITANCE
(V
IN
= 0V, f = 1MHz, T
A
= 25
o
C
)1
SYMBOL
C
ADD
C
OE
C
WE,
C
CS
C
IO
C
WE
("A" version)
PARAMETER
A0 - A18 Capacitance
OE\ Capacitance
WE\ and CS\ Capacitance
I/O 0- I/O 31 Capacitance
WE\ Capacitance
MAX
50
50
20
20
50
AS8S512K32
& AS8S512K32A
SRAM
UNITS
pF
pF
pF
pF
pF
NOTE:
1. This parameter is sampled.
AC TEST CONDITIONS
Test Specifications
Input pulse levels.........................................V
SS
to 3V
Input rise and fall times.........................................5ns
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..............................................See Figure 1
I
OL
Current Source
Device
Under
Test
-
+
+
Vz = 1.5V
(Bipolar
Supply)
Ceff = 50pf
Current Source
I
OH
NOTES:
Vz is programmable from -2V to + 7V.
I
OL
and I
OH
programmable from 0 to 16 mA.
Vz is typically the midpoint of V
OH
and V
OL
.
I
OL
and I
OH
are adjusted to simulate a typical resistive load
circuit.
Figure 1
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
Austin Semiconductor, Inc.
AS8S512K32
& AS8S512K32A
SRAM
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55
o
C<T
A
< 125
o
C and -40
o
C to +85
o
C; V
CC
= 5V +10%)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip select to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
SYMBOL
RC
AA
t
ACS
t
OH
t
LZCS
t
HZCS
t
AOE
t
LZOE
t
HZOE
t
t
-12
-15
-17
-20
-25
-35
-45
-55
UNITS NOTES
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
12
12
12
2
2
7
7
0
0
2
2
8
8
0
12
12
10
10
2
1
10
10
8
0
2
7
15
12
12
2
1
12
12
10
0
2
8
17
15
15
2
1
15
15
12
0
2
9
20
15
15
2
1
15
15
10
0
2
11
15
15
15
2
2
9
9
0
12
25
17
17
2
1
17
17
12
0
2
13
17
17
17
2
2
10
10
0
12
35
20
20
2
1
20
20
15
0
2
15
20
20
20
2
2
12
12
0
15
45
25
25
2
1
25
25
20
0
2
15
25
25
25
2
2
15
15
0
20
55
25
25
2
1
25
25
20
0
2
15
35
35
35
2
2
20
20
0
20
45
45
45
2
2
20
20
55
55
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4,6,7
4,6,7
4,6
4,6
WC
CW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
t
t
4,6,7
4,6,7
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
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