LTC2239
10-Bit, 80Msps
Low Noise 3V ADC
FEATURES
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DESCRIPTIO
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Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 211mW
61.6dB SNR at 70MHz Input
85dB SFDR at 70MHz Input
No Missing Codes
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
125Msps: LTC2253 (12-Bit), LTC2251 (10-Bit)
105Msps: LTC2252 (12-Bit), LTC2250 (10-Bit)
80Msps: LTC2229 (12-Bit), LTC2239 (10-Bit)
65Msps: LTC2228 (12-Bit), LTC2238 (10-Bit)
40Msps: LTC2227 (12-Bit), LTC2237 (10-Bit)
25Msps: LTC2226 (12-Bit), LTC2236 (10-Bit)
10Msps: LTC2225 (12-Bit)
32-Pin (5mm
×
5mm) QFN Package
The LTC
®
2239 is a 10-bit 80Msps, low power 3V A/D
converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2239 is perfect for de-
manding imaging and communications applications with
AC performance that includes 61.6dB SNR and 85dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±0.1LSB
INL (typ),
±0.1LSB
DNL (typ)
and
±0.5LSB
INL,
±0.5LSB
DNL over temperature. The
transition noise is a low 0.08LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Wireless and Wired Broadband Communication
Imaging Systems
Ultrasound
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
REFH
REFL
FLEXIBLE
REFERENCE
OV
DD
SNR (dBFS)
+
ANALOG
INPUT
INPUT
S/H
–
10-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D9
•
•
•
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
2239 TA01
CLK
U
SNR vs Input Frequency,
–1dB, 2V Range
65
64
63
62
61
60
59
58
57
56
55
0
100
50
150
INPUT FREQUENCY (MHz)
200
2239 G09
U
U
2239fa
1
LTC2239
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation............................................ 1500mW
Operating Temperature Range
LTC2239C ............................................... 0°C to 70°C
LTC2239I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
SENSE
MODE
V
CM
V
DD
D9
D8
32 31 30 29 28 27 26 25
A
IN
A
IN
+
–
1
2
D7
OF
24 D6
23 D5
22 D4
33
21 OV
DD
20 OGND
19 D3
18 D2
17 D1
9 10 11 12 13 14 15 16
REFH 3
REFH 4
REFL 5
REFL 6
V
DD
7
GND 8
SHDN
OE
NC
NC
NC
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD IS GND (PIN 33)
MUST BE SOLDERED TO PCB
CLK
ORDER PART NUMBER
LTC2239CUH
LTC2239IUH
QFN PART MARKING*
2239
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
MIN
10
–0.5
–0.5
–12
–2.5
●
●
●
●
NC
D0
TYP
±0.1
±0.1
±2
±0.5
±10
±30
±5
0.08
MAX
0.5
0.5
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
LSB
RMS
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
SENSE = 1V
2239fa
2
U
W
U
U
W W
W
U
LTC2239
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
0V < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
●
●
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Leakage
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
40MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
5MHz Input
40MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
5MHz Input
40MHz Input
70MHz Input
140MHz Input
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
5MHz Input
40MHz Input
70MHz Input
140MHz Input
I
MD
Intermodulation Distortion
Full Power Bandwidth
f
IN1
= 28.2MHz, f
IN2
= 26.8MHz
Figure 8 Test Circuit
●
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●
●
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
2.7V < V
DD
< 3.4V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
U
U
W U
U
U
MIN
1
0.5
–1
–3
–3
TYP
±0.5
to
±1
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
0
0.2
80
MIN
60
TYP
61.6
61.6
61.6
61.6
85
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
MHz
69
85
85
80
85
75
85
85
85
61.6
60
61.6
61.6
61.5
85
575
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
2239fa
3
LTC2239
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
1.79
0.09
V
V
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
2.49
0.09
V
V
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
V
IN
= 0V to V
DD
(Note 7)
●
●
●
LOGIC INPUTS (CLK, OE, SHDN)
2
0.8
–10
3
10
V
V
µA
pF
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Supply Current
Power Dissipation
Shutdown Power
Nap Mode Power
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
CONDITIONS
(Note 9)
(Note 9)
●
●
●
●
4
U W
U
U
MIN
TYP
MAX
UNITS
3
50
50
2.7
2.995
2.99
0.005
0.09
0.4
pF
mA
mA
V
V
V
V
MIN
2.7
0.5
TYP
3
3
70.3
211
2
15
MAX
3.4
3.6
82
246
UNITS
V
V
mA
mW
mW
mW
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
2239fa
LTC2239
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
PARAMETER
Sampling Frequency
CLK Low Time
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
●
●
●
●
●
TI I G CHARACTERISTICS
t
H
t
AP
t
D
Pipeline
Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 2V
P-P
with differential
drive, unless otherwise noted.
TYPICAL PERFOR A CE CHARACTERISTICS
Typical INL, 2V Range
1.0
0.8
0.6
DNL ERROR (LSB)
INL ERROR (LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
256
512
CODE
768
1024
2239 G01
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
256
512
CODE
768
1024
2239 G02
AMPLITUDE (dB)
0.4
U W
UW
MIN
1
5.9
5
5.9
5
TYP
6.25
6.25
6.25
6.25
0
MAX
80
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
CLK High Time
Sample-and-Hold Aperture Delay
CLK to DATA Delay
Data Access Time After OE↓
BUS Relinquish Time
●
●
●
1.4
2.7
4.3
3.3
5
5.4
10
8.5
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 and 11 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 1V
P-P
with
differential drive.
Note 9:
Recommended operating conditions.
Typical DNL, 2V Range
1.0
0.8
0.6
0.4
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
8192 Point FFT, f
IN
= 5MHz,
–1dB, 2V Range
0
5
10
15 20 25 30
FREQUENCY (MHz)
35
40
2239 G03
2239fa
5
FPGA/CPLD
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