Powered Device (PD) interface with a 300kHz current mode
switching regulator, providing a complete power solution
for PD applications. The LTC4267-3 integrates the 25k
signature resistor, classification current source, thermal
overload protection, signature disable and power good
signal along with an undervoltage lockout optimized for
use with the IEEE-required diode bridge. The LTC4267-3
provides an increased operational current limit, maximizing
power available for class 3 applications.
The 300kHz current mode switching regulator provides
higher output power or smaller external size compared
to its lower frequency counterparts. The LTC4267-3 is
designed for driving a 6V rated N-channel MOSFET and
features programmable slope compensation, soft-start,
and constant-frequency operation, minimizing noise even
with light loads. The LTC4267-3 includes an onboard er-
ror amplifier and voltage reference allowing use in both
isolated and nonisolated configurations.
The LTC4267-3 is available in a space saving, low profile
16-pin SSOP or DFN packages.
Complete Power Interface Port for IEEE 802
®
.3af
Powered Device (PD)
Onboard 100V, UVLO Switch
Constant-Frequency 300kHz Operation
Precision Dual Level Inrush Current Limit
Integrated Current Mode Switching Regulator
Onboard 25k Signature Resistor with Disable
Programmable Classification Current (Class 0-4)
Thermal Overload Protection
Power Good Signal
Integrated Error Amplifier and Voltage Reference
Low Profile 16-Pin SSOP or DFN Packages
applicaTions
n
n
n
n
IP Phone Power Management
Wireless Access Points
Security Cameras
Power over Ethernet
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
LTPoE++ is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
Typical applicaTion
–48V
FROM
DATA PAIR
Class 2 PD with 3.3V Isolated Power Supply
PA1133
SBM1040
10k
V
PORTP
P
VCC
3.3V
1.5A
+
HD01
–
SMAJ58A
0.1µF
PWRGD
LTC4267-3
NGATE
SENSE
R
CLASS
I
TH
/RUN
V
FB
SIGDISA
V
PORTN
PGND
P
OUT
+
P
VCC
4.7µF
+
•
5µF
MIN
•
320µF
MIN
CHASSIS
10k
P
VCC
Si3440
0.1
470
22nF
100k
–48V
FROM
SPARE PAIR
+
HD01
–
R
CLASS
68.1
1%
6.8k
BAS516
PS2911
TLV431
60.4k
42671 TA01
42673fb
For more information
www.linear.com/LTC4267-3
1
LTC4267-3
absoluTe MaxiMuM raTings
(Note 1)
V
PORTN
with Respect to V
PORTP
Voltage .. 0.3V to –100V
P
OUT
, SIGDISA,
PWRGD
Voltage.....................V
PORTN
+ 100V to V
PORTN
–0.3V
P
VCC
to PGND Voltage (Note 2)
Low Impedance Source ........................... –0.3V to 8V
Current Fed ..........................................5mA into P
VCC
R
CLASS
Voltage................V
PORTN
+ 7V to V
PORTN
– 0.3V
PWRGD
Current .....................................................10mA
R
CLASS
Current ....................................................100mA
NGATE to PGND Voltage ...........................–0.3V to P
VCC
V
FB
, I
TH
/RUN to PGND Voltages ............... –0.3V to 3.5V
SENSE to PGND Voltage .............................. –0.3V to 1V
NGATE Peak Output Current (<10μs)...........................1A
Operating Ambient Temperature Range
LTC4267C-3 ............................................. 0°C to 70°C
LTC4267I-3 ..........................................–40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
pin conFiguraTion
TOP VIEW
I
TH
/RUN
PGND
NGATE
P
VCC
R
CLASS
NC
V
PORTN
NC
1
2
3
4
5
6
7
8
17
16 V
FB
15 PGND
14 SENSE
13 V
PORTP
12 SIGDISA
11
PWRGD
10 P
OUT
9
NC
TOP VIEW
PGND 1
I
TH
/RUN 2
NGATE 3
P
VCC
4
R
CLASS
5
NC 6
V
PORTN
7
PGND 8
16 PGND
15 V
FB
14 SENSE
13 V
PORTP
12 SIGDISA
11 PWRGD
10 P
OUT
9
PGND
DHC PACKAGE
16-LEAD (5mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 43.5°C/W
EXPOSED PAD (PIN 17) MUST BE SOLDERED TO PCB HEAT SINK.
MAY BE ELECTRICALLY ISOLATED OR CONNECTED TO PGND.
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 90°C/W
orDer inForMaTion
LEAD FREE FINISH
LTC4267CDHC-3#PBF
LTC4267IDHC-3#PBF
LTC4267CGN-3#PBF
LTC4267IGN-3#PBF
LEAD BASED FINISH
LTC4267CDHC-3
LTC4267IDHC-3
LTC4267CGN-3
LTC4267IGN-3
TAPE AND REEL
LTC4267CDHC-3#TRPBF
LTC4267IDHC-3#TRPBF
LTC4267CGN-3#TRPBF
LTC4267IGN-3#TRPBF
TAPE AND REEL
LTC4267CDHC-3#TR
LTC4267IDHC-3#TR
LTC4267CGN-3#TR
LTC4267IGN-3#TR
PART MARKING*
4267-3
4267-3
4267-3
4267I-3
PART MARKING*
4267-3
4267-3
4267-3
4267-3
PACKAGE DESCRIPTION
16-Lead (5mm
×
3mm) Plastic DFN
16-Lead (5mm
×
3mm) Plastic DFN
16-Lead Narrow Plastic SSOP
16-Lead Narrow Plastic SSOP
PACKAGE DESCRIPTION
16-Lead (5mm
×
3mm) Plastic DFN
16-Lead (5mm
×
3mm) Plastic DFN
16-Lead Narrow Plastic SSOP
16-Lead Narrow Plastic SSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
2
42673fb
For more information
www.linear.com/LTC4267-3
LTC4267-3
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
SYMBOL
V
PORTN
PARAMETER
Supply Voltage
Maximum Operating Voltage
Signature Range
Classification Range
UVLO Turn-On Voltage
UVLO Turn-Off Voltage
P
VCC
Turn-On Voltage
P
VCC
Turn-Off Voltage
P
VCC
Hysteresis
P
VCC
Shunt Regulator Voltage
V
CLAMP1mA
– V
TURNON
Margin
V
PORTN
Supply Current when ON
P
VCC
Supply Current
Normal Operation
Start-Up
V
PORTN
Supply Current During
Classification
Current Accuracy During
Classification
Signature Resistance
Invalid Signature Resistance
Signature Disable
High Level Input Voltage
Signature Disable
Low Level Input Voltage
Signature Disable, Input Resistance
Power Good Output Low Voltage
Power Good Trip Point
V
PORTN
= –48V, P
OUT
,
PWRGD,
SIGDISA Floating
(Note 7)
V
ITH
/RUN – PGND = 1.3V
P
VCC
– PGND = VT
URNON
– 100mV
V
PORTN
= –17.5V, P
OUT
Tied to V
PORTP
, R
CLASS
,
SIGDISA Floating (Note 8)
10mA < I
CLASS
< 40mA, –12.5V ≤ V
PORTN
≤ –21V (Note 9)
–1.5V ≤ V
PORTN
≤ –9.5V, P
OUT
Tied to V
PORTP
, IEEE 802.3af
2-Point Measurement (Notes 4, 5)
–1.5V ≤ V
PORTN
≤ – 9.5V, SIGDISA and P
OUT
Tied to V
PORTP
,
IEEE 802.3af 2-Point Measurement (Notes 4, 5)
With Respect to V
PORTN
High Level Invalidates Signature (Note 10)
With Respect to V
PORTN
Low Level Enables Signature
With Respect to V
PORTN
I = 1mA V
PORTN
= –48V,
PWRGD
Referenced to V
PORTN
V
PORTN
= –48V, Voltage between V
PORTN
and P
OUT
(Note 11)
P
OUT
Falling
P
OUT
Rising
V
PORTN
= 0V,
PWRGD
FET Off, V
PWRGD
= 57V
I = 300mA, V
PORTN
= –48V, Measured from V
PORTN
to P
OUT
(Note 11)
P
VCC
– PGND = V
TURNON
+ 100mV
V
ITH
/RUN – PGND = 0V, P
VCC
– P
GND
= 8V
Referenced to PGND, P
VCC
– P
GND
= 8V (Note 12)
P
VCC
– P
GND
= 8V (Note 12)
I
TH
/RUN Pin Load = ±5µA (Note 12)
V
TURNOFF
< P
VCC
< V
CLAMP
(Note 12)
I
TH
/RUN Sinking 5µA, P
VCC
– P
GND
= 8V (Note 12)
I
TH
/RUN Sourcing 5µA, P
VCC
– P
GND
= 8V (Note 12)
V
PORTN
= 0V, Power MOSFET Off, P
OUT
= 57V (Note 13)
V
PORTN
= –48V, P
OUT
= –43V (Note 14, 15)
●
●
●
elecTrical characTerisTics
CONDITIONS
Voltage with Respect to V
PORTP
Pin
(Notes 4, 5, 6)
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
MIN
TYP
MAX
UNITS
V
V
V
V
V
V
V
V
V
V
mA
µA
µA
mA
%
kW
kW
V
V
kW
–1.5
–12.5
–34.8
–29.3
7.6
4.6
1
8.3
0.05
–57
–9.5
–21
–36 –37.2
–30.5 –31.5
8.7
5.7
3
9.4
0.6
3
240
40
350
90
0.65
±3.5
10.3
9.2
7
V
TURNON
V
TURNOFF
V
HYST
V
CLAMP1mA
V
MARGIN
I
VPORTN_ON
I
PVCC_ON
Voltage with Respect to PGND
Voltage with Respect to PGND
V
TURNON
– V
TURNOFF
I
PVCC
= 1mA, V
ITH
/RUN = 0V, Voltage with Respect to PGND
I
VPORTN_
CLASS
0.35
0.5
ΔI
CLASS
R
SIGNATURE
R
INVALID
V
IH
V
IL
R
INPUT
V
PG_OUT
23.25
9
3
26.00
11.8
57
0.45
100
0.5
V
V
PG _FALL
V
PG_RISE
I
PG_LEAK
R
ON
V
ITHSHDN
I
THSTART
V
FB
I
FB
g
m
ΔV
O(LINE)
ΔV
O(LOAD)
I
POUT_LEAK
I
LIM_HI
●
●
●
1.3
2.7
1.5
3
1
1.7
3.3
1
1.6
2
0.45
0.4
50
500
V
V
µA
W
W
V
µA
V
nA
µA/V
mV/V
mV/µA
mV/µA
Power Good Leakage Current
On-Resistance
Shutdown Threshold (at I
TH
/RUN)
Start-Up Current Source at I
TH
/RUN
Regulated Feedback Voltage
V
FB
Input Current
Error Amplifier Transconductance
Output Voltage Line Regulation
Output Voltage Load Regulation
P
OUT
Leakage
Input Current Limit, High Level
●
●
0.15
0.2
0.780
200
0.28
0.3
10
333
0.05
3
3
0.800 0.812
150
350
450
µA
mA
42673fb
For more information
www.linear.com/LTC4267-3
3
LTC4267-3
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
SYMBOL
I
LIM_LO
f
OSC
DC
ON(MIN)
DC
ON(MAX)
t
RISE
t
FALL
V
IMAX
I
SLMAX
t
SFST
T
SHUTDOWN
PARAMETER
Input Current Limit, Low Level
Oscillator Frequency
Minimum Switch On Duty Cycle
Maximum Switch On Duty Cycle
NGATE Drive Rise Time
NGATE Drive Fall Time
Peak Current Sense Voltage
Peak Slope Compensation Output
Current
Soft-Start Time
CONDITIONS
V
PORTN
= –48V, P
OUT
= –43V (Note 14, 15)
V
ITH
/RUN – PGND = 1.3V, P
VCC
– P
GND
= 8V
V
ITH
/RUN – PGND = 1.3V, V
FB
– PGND = 0.8V, P
VCC
– P
GND
= 8V
V
ITH
/RUN – PGND = 1.3V, V
FB
– PGND = 0.8V, P
VCC
– P
GND
= 8V
C
LOAD
= 3000pF, P
VCC
– P
GND
= 8V
C
LOAD
= 3000pF, P
VCC
– P
GND
= 8V
R
SL
= 0, P
VCC
– P
GND
= 8V (Note 16)
P
VCC
– P
GND
= 8V (Note 17)
P
VCC
– P
GND
= 8V
●
●
elecTrical characTerisTics
MIN
90
270
TYP
300
8
MAX
205
330
9.6
90
UNITS
mA
kHz
%
%
ns
ns
70
80
40
40
90
100
5
1.4
140
115
mV
A
ms
°C
Thermal Shutdown Trip Temperature (Notes 14, 18)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
P
VCC
internal clamp circuit self regulates to 9.4V with respect to
PGND.
Note 3:
The LTC4267-3 operates with a negative supply voltage in the
range of – 1.5V to – 57V. To avoid confusion, voltages for the PD interface
are always referred to in terms of absolute magnitude. Terms such as
“maximum negative voltage” refer to the largest negative voltage and
a “rising negative voltage” refers to a voltage that is becoming more
negative.
Note 4:
The LTC4267-3 is designed to work with two polarity protection
diode drops between the PSE and PD. Parameter ranges specified in the
Electrical Characteristics section are with respect to this product pins and
are designed to meet IEEE 802.3af specifications when these diode drops
are included. See the Application Information section.
Note 5:
Signature resistance is measured via the two-point
ΔV/ΔI
method
as defined by IEEE 802.3af. The PD signature resistance is offset from
the 25k to account for diode resistance. With two series diodes, the total
PD resistance will be between 23.75k and 26.25k and meet IEEE 802.3af
specifications. The minimum probe voltages measured at the LTC4267-3
pins are –1.5V and –2.5V. The maximum probe voltages are –8.5V and
–9.5V.
Note 6:
The PD interface includes hysteresis in the UVLO voltages to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the PD
will power up from a voltage source with 20W series resistance on the first
trial.
Note 7:
Dynamic Supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 8:
I
VPORTN_CLASS
does not include classification current
programmed at the R
CLASS
pin. Total current in classification mode will be
I
VPORTN_CLASS
+ I
CLASS
(See note 9).
Note 9:
I
CLASS
is the measured current flowing through R
CLASS
.
ΔI
CLASS
accuracy is with respect to the ideal current defined as I
CLASS
= 1.237/
R
CLASS
. The current accuracy does not include variations in R
CLASS
resistance. The total classification current for a PD also includes the IC
quiescent current (I
VPORTN_CLASS
). See the Applications Information section.
Note 10:
To disable the 25k signature, tie SIGDISA to V
PORTP
or hold
SIGDISA high with respect to V
PORTN
. See the Applications Information
section.
Note 11:
For the DHC package, this parameter is assured by design and
wafer level testing.
Note 12:
The switching regulator is tested in a feedback loop that servos
V
FB
to the output of the error amplifier while maintaining I
TH
/RUN at the
midpoint of the current limit range.
Note 13:
I
POUT_LEAK
includes current drawn through P
OUT
by the power
good status circuit. This current is compensated for in the 25k signature
resistance and does not affect PD operation.
Note 14:
The LTC4267-3 PD Interface includes thermal protection. In
the event of an overtemperature condition, the PD interface will turn off
the switching regulator until the part cools below the overtemperature
limit. The LTC4267-3 is also protected against thermal damage from
incorrect classification probing by the PSE. If the LTC4267-3 exceeds the
overtemperature threshold, the classification load current is disabled.
Note 15:
The PD interface includes dual level input current limit. At turn-
on, before the P
OUT
load capacitor is charged, the PD current level is set
to a low level. After the load capacitor is charged and the P
OUT
– V
PORTN
voltage difference is below the power good threshold, the PD switches to
high level current limit. The PD stays in high level current limit until the
input voltage drops below the UVLO turn-off threshold.
Note 16:
Peak current sense voltage is reduced dependent on duty cycle
and an optional external resistor in series with the SENSE pin (R
SL
). For
details, refer to the programmable slope compensation feature in the
Applications Information section.
Note 17:
Guaranteed by design.
Note 18:
The LTC4267-3 features thermal overload protection. Thermal
overload protection is intended to protect the device during momentary
fault conditions and continuous operation in thermal overload should be
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