LTC2230/LTC2231
10-Bit,170Msps/
135Msps ADCs
FEATURES
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DESCRIPTIO
■
Sample Rate: 170Msps/135 Msps
61dB SNR up to 140MHz Input
75dB SFDR up to 200MHz Input
775MHz Full Power Bandwidth S/H
Single 3.3V Supply
Low Power Dissipation: 890mW/660mW
LVDS, CMOS, or Demultiplexed CMOS Outputs
Selectable Input Ranges:
±0.5V
or
±1V
No Missing Codes
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
185Msps: LTC2220-1 (12-Bit)
170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)
135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)
64-Pin 9mm x 9mm QFN Package
The LTC
®
2230 and LTC2231 are 170Msps/135Msps, sam-
pling 10-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. The LTC2230/
LTC2231 are perfect for demanding communications
applications with AC performance that includes 61dB SNR
and 75dB spurious free dynamic range for signals
up to 200MHz. Ultralow jitter of 0.15ps
RMS
allows
undersampling of IF frequencies with excellent noise
performance.
DC specs include
±0.2LSB
INL (typ),
±0.1LSB
DNL (typ)
and no missing codes over temperature. The transition
noise is a low 0.12LSB
RMS
.
The digital outputs can be either differential LVDS, or
single-ended CMOS. There are three format options for
the CMOS outputs: a single bus running at the full data rate
or two demultiplexed buses running at half data rate with
either interleaved or simultaneous update. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC
+
and ENC
–
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL, or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
APPLICATIO S
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Wireless and Wired Broadband Communication
Cable Head-End Systems
Power Amplifier Linearization
Communications Test Equipment
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
REFH
REFL
FLEXIBLE
REFERENCE
3.3V
V
DD
0.5V
TO 3.6V
90
85
80
OV
DD
SFDR (dBFS)
+
ANALOG
INPUT
INPUT
S/H
–
10-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D9
•
•
•
D0
CMOS
OR
LVDS
OGND
CLOCK/DUTY
CYCLE
CONTROL
22301 TA01
ENCODE INPUT
U
SFDR vs Input Frequency
4th OR HIGHER
75
70
65
60
55
50
45
40
0
100
300
500
200
400
INPUT FREQUENCY (MHz)
600
2nd OR 3rd
2230 TA01b
U
U
22301fb
1
LTC2230/LTC2231
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ............... –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2230C, LTC2231C ............................. 0°C to 70°C
LTC2230I, LTC2231I ...........................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
64 GND
63 V
DD
62 V
DD
61 GND
60 V
CM
59 SENSE
58 MODE
57 LVDS
56 OF
+
/OFA
55 OF
–
/DA9
54 D9
+
/DA8
53 D9
–
/DA7
52 D8
+
/DA6
51 D8
–
/DA5
50 OGND
49 OV
DD
A
IN+
1
A
IN+
2
A
IN–
3
A
IN–
4
REFHA 5
REFHA 6
REFLB 7
REFLB 8
REFHB 9
REFHB 10
REFLA 11
REFLA 12
V
DD
13
V
DD
14
V
DD
15
GND 16
65
48 D7
+
/DA4
47 D7
–
/DA3
46 D6
+
/DA2
45 D6
–
/DA1
44 D5
+
/DA0
43 D5
–
/DNC
42 OV
DD
41 OGND
40 D4
+
/DNC
39 D4
–
/CLOCKOUTA
38 D3
+
/CLOCKOUTB
37 D3
–
/OFB
36 CLOCKOUT
+
/DB9
35 CLOCKOUT
–
/DB8
34 OV
DD
33 OGND
T
JMAX
= 150°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC2230CUP
LTC2230IUP
LTC2231CUP
LTC2231IUP
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
Internal Reference
External Reference
SENSE = 1V
CONDITIONS
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
LTC2230
TYP
±0.2
±0.1
±0.5
±0.1
ENC
+
17
ENC
–
18
SHDN 19
OE 20
DNC 21
DNC 22
DNC/DB1 23
DNC/DB1 24
OGND 25
OV
DD
26
D0
–
/DB2 27
D0
+
/DB3 28
D1
–
/DB4 29
D1
+
/DB5 30
D2
–
/DB6 31
D2
+
/DB7 32
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
UP PART MARKING*
LTC2230UP
LTC2230UP
LTC2231UP
LTC2231UP
MAX
1
0.6
MIN
10
–0.8
–0.6
LTC2231
TYP
±0.2
±0.1
±0.5
±0.1
MAX
0.8
0.6
UNITS
Bits
LSB
LSB
LSB
LSB
10
–1
–0.6
Differential Analog Input (Note 5)
Differential Analog Input
Single-Ended Analog Input (Note 5)
Single-Ended Analog Input
(Note 6)
External Reference
●
●
●
●
–35
–2.5
±3
±0.5
±10
±30
±15
0.12
35
2.5
–35
–2.5
±3
±0.5
±10
±30
±15
0.12
35
2.5
%FS
μV/C
ppm/C
ppm/C
LSB
RMS
22301fb
2
U
mV
W
U
U
W W
W
U
LTC2230/LTC2231
A ALOG I PUT
SYMBOL
V
IN
V
IN, CM
I
IN
I
SENSE
I
MODE
I
LVDS
t
AP
t
JITTER
CMRR
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 9)
PARAMETER
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Pull-Down Current to GND
LVDS Pin Pull-Down Current to GND
Sample and Hold Acquisition Delay Time
Sample and Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
Figure 8 Test Circuit
+ A
IN–
)/2
CONDITIONS
3.1V < V
DD
< 3.5V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
0 < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
●
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio (Note 10)
CONDITIONS
5MHz Input (1V Range)
5MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic (Note 11)
5MHz Input (1V Range)
5MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher (Note 11)
5MHz Input (1V Range)
5MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
140MHz Input (1V Range)
140MHz Input (2V Range)
250MHz Input (1V Range)
250MHz Input (2V Range)
S/(N+D)
Signal-to-Noise
Plus Distortion Ratio (Note 12)
5MHz Input (1V Range)
5MHz Input (2V Range)
70MHz Input (1V Range)
70MHz Input (2V Range)
IMD
Intermodulation Distortion
f
IN1
= 138MHz,
f
IN2
= 140MHz
●
●
●
●
DY A IC ACCURACY
U
W U
U
MIN
1
0.5
–1
–1
TYP
±0.5
to
±1
1.6
1.6
MAX
1.9
2.1
1
1
UNITS
V
V
V
μA
μA
μA
μA
ns
ps
RMS
dB
MHz
10
10
0
0.15
80
775
MIN
LTC2230
TYP
59.5
61.2
MAX
MIN
LTC2231
TYP
59.5
61.2
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
db
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
60.4
59.5
61.1
59.4
61.0
59.0
60.6
80
78
60.4
59.5
61.1
59.4
61.0
59.0
60.6
80
78
64
80
78
78
78
75
74
86
86
68
80
78
78
78
78
78
86
86
73
86
86
86
86
85
85
59.5
61.2
74
86
86
86
86
85
85
59.5
61.2
59.5
59.5
61.1
81
60
59.5
61.1
81
22301fb
3
LTC2230/LTC2231
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
3.1V < V
DD
< 3.5V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
ID
V
ICM
R
IN
C
IN
V
IH
V
IL
I
IN
C
IN
OV
DD
= 3.3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
V
OD
V
OS
High Level Output Voltage
Low Level Output Voltage
Differential Output Voltage
Output Common Mode Voltage
I
O
= –200μA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200μA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3.3V
I
O
= –10μA
I
O
= –200μA
I
O
= 10μA
I
O
= 1.6mA
PARAMETER
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
(Note 7)
V
DD
= 3.3V
V
DD
= 3.3V
V
IN
= 0V to V
DD
(Note 7)
CONDITIONS
ENCODE INPUTS (ENC
+
, ENC
–
)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
LOGIC INPUTS (OE, SHDN)
●
●
●
LOGIC OUTPUTS (CMOS MODE)
3
50
50
●
●
LOGIC OUTPUTS (LVDS MODE)
100Ω Differential Load
100Ω Differential Load
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.570
TYP
1.600
±25
3
4
MAX
1.630
UNITS
V
ppm/°C
mV/V
Ω
TYP
MAX
UNITS
V
0.2
1.1
1.6
1.6
6
3
2
0.8
–10
3
10
2.5
Internally Set
Externally Set (Note 7)
●
V
V
kΩ
pF
V
V
μA
pF
pF
mA
mA
V
V
0.4
V
V
V
V
V
V
454
1.375
mV
V
3.1
3.295
3.29
0.005
0.09
2.49
0.09
1.79
0.09
247
1.125
350
1.250
22301fb
LTC2230/LTC2231
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
SYMBOL
V
DD
P
SHDN
P
NAP
OV
DD
I
VDD
I
OVDD
P
DISS
OV
DD
I
VDD
P
DISS
PARAMETER
Analog Supply Voltage
Shutdown Power
Nap Mode Power
Output Supply Voltage
Analog Supply Current
Output Supply Current
Power Dissipation
Output Supply Voltage
Analog Supply Current
Power Dissipation
(Note 8)
CONDITIONS
(Note 8)
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
(Note 8)
●
●
●
●
●
●
●
POWER REQUIRE E TS
LVDS OUTPUT MODE
3
3.3
264
53
1045
0.5
3.3
264
890
3.6
288
68
1175
3.6
288
0.5
3
3.3
196
53
822
3.3
196
660
3.6
212
68
924
3.6
212
V
mA
mA
mW
V
mA
mW
CMOS OUTPUT MODE
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
S
t
L
t
H
t
AP
t
OE
t
D
t
C
PARAMETER
Sampling Frequency
ENC Low Time (Note 7)
ENC High Time (Note 7)
Sample-and-Hold Aperture Delay
Output Enable Delay
ENC to DATA Delay
ENC to CLOCKOUT Delay
DATA to CLOCKOUT Skew
Rise Time
Fall Time
Pipeline Latency
CMOS OUTPUT MODE
t
D
t
C
ENC to DATA Delay
ENC to CLOCKOUT Delay
DATA to CLOCKOUT Skew
Pipeline Latency Full Rate CMOS
Demuxed Interleaved
Demuxed Simultaneous
(Note 7)
(Note 7)
(t
C
- t
D
) (Note 7)
●
●
●
TI I G CHARACTERISTICS
LVDS OUTPUT MODE
(Note 7)
(Note 7)
(t
C
- t
D
) (Note 7)
●
●
●
U W
LTC2230
MIN
TYP
MAX
3.1
3.3
2
35
3.5
LTC2231
MIN
TYP
MAX
3.1
3.3
2
35
3.5
UNITS
V
mW
mW
UW
CONDITIONS
(Note 8)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
●
●
●
●
●
●
LTC2230
MIN
TYP
MAX
1
2.8
2
2.8
2
2.94
2.94
2.94
2.94
0
5
1.3
1.3
–0.6
2.2
2.2
0
0.5
0.5
5
1.3
1.3
–0.6
2.1
2.1
0
5
5
5 and 6
3.5
3.5
0.6
10
3.5
3.5
0.6
170
500
500
500
500
LTC2231
MIN
TYP
MAX
1
3.5
2
3.5
2
3.7
3.7
3.7
3.7
0
5
1.3
1.3
–0.6
2.2
2.2
0
0.5
0.5
5
1.3
1.3
–0.6
2.1
2.1
0
5
5
5 and 6
3.5
3.5
0.6
10
3.5
3.5
0.6
135
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
ns
ns
ns
Cycles
Cycles
Cycles
22301fb
5
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