PTN36241B
SuperSpeed USB 3.0 redriver
Rev. 4 — 22 May 2014
Product data sheet
1. General description
PTN36241B is a SuperSpeed USB 3.0 redriver IC that enhances signal quality by
performing receive equalization on the deteriorated input signal followed by transmit
de-emphasis maximizing system link performance. With its superior differential signal
conditioning and enhancement capability, the device delivers significant flexibility and
performance scaling for various systems with different PCB trace and cable channel
conditions and still benefit from optimum power consumption.
PTN36241B is a dual-channel device that supports data signaling rate of 5 Gbit/s through
each channel. PTN36241B has two channels: one channel is facing the USB host, and
another channel is facing the USB peripheral or device. Each channel consists of a
high-speed Transmit (Tx) differential lane and a high-speed Receive (Rx) differential lane.
PTN36241B has independent 5-level configuration pins for each channel to select receive
equalization, transmit de-emphasis and output swing and these pins can be easily
configured by board-strapping (for example, short, open, resistor). To support applications
that require greater level of configurability, PTN36241B delivers intelligent multiplexing of
I
2
C-bus interface onto 5-level configuration pins. By default, the device is configured with
the board-strapped levels of configuration pins. When I
2
C-bus reads/writes are performed
over these multiplexed pins, the device decodes I
2
C transactions and configures its
internal functions appropriately.
PTN36241B has built-in advanced power management capability that enables significant
power savings under various different USB 3.0 Low-power modes (U2/U3). It can detect
LFPS signaling and link electrical conditions and can dynamically activate/de-activate
internal circuitry and logic. The device performs these actions without host software
intervention and conserves power.
PTN36241B goes through the compliance testing controlled by the internal state machine.
No compliance pin is required.
PTN36241B is powered from 3.3 V supply and is available in HVQFN24 4 mm
4 mm
package with 0.5 mm pitch.
2. Features and benefits
2.1 High-speed channel processing
Supports USB 3.0 specification (SuperSpeed only)
Support of 2 channels
Selectable receive equalization on each channel to recover from InterSymbol
Interference (ISI) and high-frequency losses, with provision to choose from five
Equalization gain settings per channel
NXP Semiconductors
PTN36241B
SuperSpeed USB 3.0 redriver
Selectable transmit de-emphasis and output swing on each channel delivers
pre-compensation suited to channel conditions
Supports pin and I
2
C-bus programmable Input Signal Threshold setting to work
reliably under different noise environments accommodating sensitivity needs
Integrated termination resistors provide impedance matching on both transmit and
receive sides
Programmable termination resistor for receiver side
Automatic receiver termination indication and detection
Low active power: 330 mW/100 mA (typical), V
DD
= 3.3 V
Power-saving states:
53 mW/16 mA (typical) when in U2/U3 states
20 mW/6 mA (typical) when no connection detected
Excellent differential and common return loss performance
14 dB differential and 15 dB common-mode return loss for 10 MHz to 1250 MHz
Flow-through pinout to ease PCB layout and minimize crosstalk effects
Hot Plug capable
Supports EasyCom that goes through the compliance testing controlled by the internal
state machine
Power supply: V
DD
= 3.3 V
10 %
HVQFN24 4 mm
4 mm package, 0.5 mm pitch; exposed center pad for thermal relief
and electrical ground
ESD: 5 kV HBM, 1250 V CDM
Operating temperature range 0
C
to 85
C
2.2 Enhancements
Intelligent I
2
C-bus multiplexing and 5-level logic configuration options (with
patent-pending quinary pins) delivering ultimate flexibility
I
2
C-bus interface:
Standard-mode (100 kbit/s) or Fast-mode (400 kbit/s)
3.3 V tolerant
3. Applications
Notebook/netbook/nettop platforms
Docking stations
Desktop and AIO platforms
Active cables
Server and storage platforms
USB 3.0 peripherals like consumer/storage devices, printers or USB 3.0 capable
hubs/repeaters
PTN36241B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 22 May 2014
2 of 31
NXP Semiconductors
PTN36241B
SuperSpeed USB 3.0 redriver
4. System context diagrams
Figure 1
illustrates PTN36241B usage.
MOTHERBOARD
AIN+
Tx
CPU/CHIP SET/
USB HOST
CONTROLLER
Rx
AIN-
AOUT+
CONNECTOR
AOUT-
CONNECTOR
CONNECTOR
PTN36241B
BOUT-
BOUT+
BIN-
BIN+
USB
PERIPHERAL
USB cable
MOTHERBOARD
Tx
CPU/CHIP SET/
USB HOST
CONTROLLER
Rx
DOCKING
STATION
AIN-
AOUT-
CONNECTOR
AIN+
AOUT+
PTN36241B
BOUT-
BOUT+
BIN-
BIN+
USB
PERIPHERAL
USB cable
USB 3.0 PERIPHERAL/DEVICE
AIN+
CONNECTOR
COMPUTER
PLATFORM
WITH
USB 3.0 HOST
CONTROLLER
CONNECTOR
AIN-
AOUT+
AOUT-
FUNCTION
WITH USB 3.0
DEVICE
CONTROLLER
PTN36241B
BOUT-
BOUT+
BIN-
BIN+
USB cable
002aag030
Fig 1.
PTN36241B context diagrams
PTN36241B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 22 May 2014
3 of 31
NXP Semiconductors
PTN36241B
SuperSpeed USB 3.0 redriver
5. Ordering information
Table 1.
Ordering information
Topside
marking
241B
Package
Name
HVQFN24
Description
plastic thermal enhanced very thin quad flat package; no leads;
24 terminals; body 4
4
0.85 mm
[1]
Version
SOT616-3
Type number
PTN36241BBS
[1]
Maximum package height is 1 mm.
5.1 Ordering options
Table 2.
Ordering options
Orderable
part number
PTN36241BBS,115
PTN36241BBS,118
PTN36241BBS,128
Package
Packing method
[1]
Minimum
order
quantity
1500
6000
6000
Temperature
Type number
PTN36241BBS
HVQFN24
HVQFN24
HVQFN24
Reel 7” Q1/T1
*Standard mark SMD
Reel 13” Q1/T1
*Standard mark SMD
Reel 13” Q2/T3
*Standard mark SMD
T
amb
= 0
C
to 85
C
T
amb
= 0
C
to 85
C
T
amb
= 0
C
to 85
C
[1]
Refer to
Figure 13 “Product orientation in carrier tape”
for pin 1 location.
6. Block diagram
V
DD
= 3.3 V
PTN36241B
equalizer
AIN+
AIN−
SQUELCH
AND LFPS
DETECTION
EMPHASIS
FILTER
RX
TERMINATION
DETECTION
line
driver
AOUT+
AOUT−
line
driver
BOUT+
BOUT−
RX
TERMINATION
DETECTION
EMPHASIS
FILTER
equalizer
BIN+
BIN−
SQUELCH
AND LFPS
DETECTION
002aaf796
DEVICE CONTROL AND MANAGEMENT
AEQ
CEN
AOS
BOS
ADE/ADD
SQTH
BEQ/SDA
BDE/SCL
Fig 2.
Block diagram of PTN36241B
PTN36241B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 22 May 2014
4 of 31
NXP Semiconductors
PTN36241B
SuperSpeed USB 3.0 redriver
7. Pinning information
7.1 Pinning
23 AOUT−
22 AOUT+
20 BIN−
terminal 1
index area
V
DD(3V3)
AEQ
ADE/ADD
AOS
CEN
GND
1
2
3
4
5
6
19 BIN+
18 GND
17 BEQ/SDA
16 BDE/SCL
15 BOS
14 RES
13 V
DD(3V3)
BOUT+ 12
002aaf799
PTN36241BBS
GND
GND 10
BOUT− 11
7
8
9
AIN+
Transparent top view
Fig 3.
Pin configuration for HVQFN24
7.2 Pin description
Table 3.
Symbol
AIN+
Pin description
Pin
9
Type
self-biasing
differential input
self-biasing
differential input
Description
Differential signal from SuperSpeed USB 3.0 transmitter.
AIN+ makes a differential pair with AIN. The input to this
pin must be AC-coupled externally.
Differential signal from SuperSpeed USB 3.0 transmitter.
AIN makes a differential pair with AIN+. The input to this
pin must be AC-coupled externally.
High-speed differential signals
AIN
8
BOUT+
12
self-biasing
Differential signal to SuperSpeed USB 3.0 receiver.
differential output BOUT+ makes a differential pair with BOUT. The output
of this pin must be AC-coupled externally.
self-biasing
Differential signal to SuperSpeed USB 3.0 receiver.
differential output BOUT makes a differential pair with BOUT+. The output
of this pin must be AC-coupled externally.
self-biasing
Differential signal to SuperSpeed USB 3.0 receiver.
differential output AOUT+ makes a differential pair with AOUT. The output
of this pin must be AC-coupled externally.
self-biasing
Differential signal to SuperSpeed USB 3.0 receiver.
differential output AOUT makes a differential pair with AOUT+. The output
of this pin must be AC-coupled externally.
BOUT
11
AOUT+
22
AOUT
23
PTN36241B
All information provided in this document is subject to legal disclaimers.
SQTH
AIN−
21 GND
24 n.c.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 22 May 2014
5 of 31
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