LTC2248/LTC2247/LTC2246
14-Bit, 65/40/25Msps
Low Power 3V ADCs
FEATURES
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DESCRIPTIO
■
Sample Rate: 65Msps/40Msps/25Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 205mW/120mW/75mW
74.3dB SNR
90dB SFDR
No Missing Codes
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
125Msps: LTC2253 (12-Bit), LTC2255 (14-Bit)
105Msps: LTC2252 (12-Bit), LTC2254 (14-Bit)
80Msps: LTC2229 (12-Bit), LTC2249 (14-Bit)
65Msps: LTC2228 (12-Bit), LTC2248 (14-Bit)
40Msps: LTC2227 (12-Bit), LTC2247 (14-Bit)
25Msps: LTC2226 (12-Bit), LTC2246 (14-Bit)
10Msps: LTC2225 (12-Bit), LTC2245 (14-Bit)
32-Pin (5mm
×
5mm) QFN Package
The LTC
®
2248/LTC2247/LTC2246 are 14-bit 65Msps/
40Msps/25Msps, low power 3V A/D converters designed
for digitizing high frequency, wide dynamic range signals.
The LTC2248/LTC2247/LTC2246 are perfect for demand-
ing imaging and communications applications with AC
performance that includes 74.3dB SNR and 90dB SFDR
for signals at the Nyquist frequency.
DC specs include
±1LSB
INL (typ),
±0.5LSB
DNL (typ) and
no missing codes over temperature. The transition noise
is a low 1LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Wireless and Wired Broadband Communication
Imaging Systems
Ultrasound
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
REFH
REFL
FLEXIBLE
REFERENCE
OV
DD
+
ANALOG
INPUT
INPUT
S/H
SNR (dBFS)
–
14-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D13
•
•
•
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
2249 TA01a
CLK
U
LTC2248: SNR vs Input Frequency,
–1dB, 2V Range, 65Msps
75
74
73
72
71
70
0
100
50
150
INPUT FREQUENCY (MHZ)
200
2249 TAO1b
U
U
224876fa
1
LTC2248/LTC2247/LTC2246
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SENSE
MODE
V
CM
D13
D12
D11
V
DD
OF
OV
DD
= V
DD
(Notes 1, 2)
SHDN
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2248C, LTC2247C, LTC2246C ........... 0°C to 70°C
LTC2248I, LTC2247I, LTC2246I ..........–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
32 31 30 29 28 27 26 25
AIN
+
1
AIN
–
2
REFH 3
REFH 4
REFL 5
REFL 6
V
DD
7
GND 8
9 10 11 12 13 14 15 16
OE
D0
D1
D2
D3
CLK
D4
24 D10
23 D9
22 D8
33
21 OV
DD
20 OGND
19 D7
18 D6
17 D5
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD IS GND (PIN 33)
MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC2248CUH
LTC2248IUH
LTC2247CUH
LTC2247IUH
LTC2246CUH
LTC2246IUH
QFN PART MARKING*
2248
2248
2247
2247
2246
2246
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution
(No Missing Codes)
Integral
Linearity Error
Differential
Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
Internal Reference
External Reference
SENSE = 1V
Differential Analog Input
(Note 5)
Differential Analog Input
(Note 6)
External Reference
CONDITIONS
●
●
●
●
●
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
LTC2248
MIN
TYP
MAX
14
–4
–1
–12
–2.5
±1
±0.5
±2
±0.5
±10
±30
±5
1
4
1
12
2.5
LTC2247
MIN
TYP
MAX
14
–4
–1
–12
–2.5
±1
±0.5
±2
±0.5
±10
±30
±5
1
4
1
12
2.5
LTC2246
MIN
TYP
MAX
14
–4
–1
–12
–2.5
±1
±0.5
±2
±0.5
±10
±30
±5
1
4
1
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
LSB
RMS
224876fa
2
U
W
U
U
W W
W
U
LTC2248/LTC2247/LTC2246
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
0V < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
●
●
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Leakage
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free
Dynamic Range
2nd or 3rd
Harmonic
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free
Dynamic Range
4th Harmonic
or Higher
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
S/(N+D)
Signal-to-Noise
Plus Distortion
Ratio
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
I
MD
Intermodulation
Distortion
f
IN1
= 28.2MHz
f
IN2
= 26.8MHz
●
●
●
●
●
●
●
●
●
●
●
●
U
W U
U
MIN
1
0.5
–1
–3
–3
TYP
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
±0.5V
to
±1V
0
0.2
80
Figure 8 Test Circuit
575
LTC2248
MIN
TYP
MAX
74.3
LTC2247
MIN
TYP
MAX
74.4
LTC2246
MIN
TYP
MAX
74.5
72.9
74.2
UNITS
dB
dB
dB
dB
72.9
72.5
74.3
74.3
73.9
90
76
76
90
85
80
95
84
84
95
95
90
74.3
72.2
72
74.2
74.1
71.9
90
74.4
73.9
73.3
90
76
90
85
80
95
84
95
95
90
74.4
72.2
74.3
73.6
71.9
90
73.4
71.8
90
95
90
74.5
74.2
85
80
95
95
73.4
73
90
90
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
224876fa
3
LTC2248/LTC2247/LTC2246
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply
Voltage
Output Supply
Voltage
Supply Current
Power Dissipation
Shutdown Power
Nap Mode Power
SHDN = H,
OE = H, No CLK
SHDN = H,
OE = L, No CLK
CONDITIONS
(Note 9)
(Note 9)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
LTC2248
MIN
TYP
MAX
●
●
●
●
4
U W
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
2.7V < V
DD
< 3.4V
–1mA < I
OUT
< 1mA
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
LTC2247
MIN
TYP
MAX
2.7
0.5
3
3
40
120
2
15
3.4
3.6
48
144
LTC2246
MIN
TYP
MAX
2.7
0.5
3
3
25
75
2
15
3.4
3.6
30
90
UNITS
V
V
mA
mW
mW
mW
2.7
0.5
3
3
68.3
205
2
15
3.4
3.6
80
240
224876fa
LTC2248/LTC2247/LTC2246
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
PARAMETER
CLK Low Time
CONDITIONS
●
●
●
●
●
TI I G CHARACTERISTICS
t
H
t
AP
t
D
Pipeline
Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 65MHz (LTC2248), 40MHz (LTC2247), or
25MHz (LTC2246), input range = 2V
P-P
with differential drive, unless
otherwise noted.
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2248: Typical INL,
2V Range, 65Msps
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
4096
8192
CODE
12288
16384
2248 G01
DNL ERROR (LSB)
INL ERROR (LSB)
U W
UW
LTC2248
MIN
TYP
MAX
1
7.3
5
7.3
5
7.7
7.7
7.7
7.7
0
65
500
500
500
500
LTC2247
MIN
TYP
MAX
1
11.8
5
11.8
5
12.5
12.5
12.5
12.5
0
40
500
500
500
500
LTC2246
MIN
TYP
MAX
1
18.9
5
18.9
5
20
20
20
20
0
25
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
Sampling Frequency (Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
CLK High Time
Sample-and-Hold
Aperture Delay
CLK to DATA delay
Data Access Time
After OE↓
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
●
●
●
1.4
2.7
4.3
3.3
5
5.4
10
8.5
1.4
2.7
4.3
3.3
5
5.4
10
8.5
1.4
2.7
4.3
3.3
5
5.4
10
8.5
ns
ns
ns
Cycles
BUS Relinquish Time (Note 7)
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and
11 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 65MHz (LTC2248), 40MHz (LTC2247), or
25MHz (LTC2246), input range = 1V
P-P
with differential drive.
Note 9:
Recommended operating conditions.
LTC2248: Typical DNL,
2V Range, 65Msps
1.00
0.75
0.50
0.25
0
–0.25
–0.50
–0.75
–1.00
0
4096
8192
CODE
12288
16384
2248 G02
224876fa
5
FPGA/CPLD
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