interface functions for a device operating in an IEEE
802.3af Power over Ethernet (PoE) system. The LTC4257
simplifies Powered Device (PD) design by incorporating
the 25k signature resistor, the classification current source,
input current limit with thermal foldback, undervoltage
lockout and power good signalling, all in a single 8-pin
package. By incorporating a high voltage power MOSFET
onboard, the LTC4257 provides the system designer with
reduced cost while also saving board space.
The LTC4257 can interface directly with a variety of Linear
Technology DC/DC converter products to provide a cost
effective power solution for IP phones, wireless access
points and other PDs. Linear Technology also provides
solutions for Power Sourcing Equipment (PSE) applica-
tions with quad network power controllers.
The LTC4257 is available in the 8-pin SO and low profile
(3mm
×
3mm) DFN packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
■
■
■
IP Phone Power Management
Wireless Access Points
Telecom Power Control
TYPICAL APPLICATIO
Powered Device (PD)
–48V FROM
POWER SOURCING
EQUIPMENT
(PSE)
~
+
0.1µF
SMAJ58A
LTC4257
GND
R
CLASS
100k
PWRGD
V
IN
V
OUT
5µF
MIN
V
IN
+
DF01SA
SWITCHING
POWER SUPPLY
SHDN
RTN
+
3.3V
TO LOGIC
~
–
R
CLASS
4257 TA01
–
PWRGD
50V/DIV
5ms/DIV
4225 TA02
U
LTC4257 Charging 300µF
Load Capacitor
V
IN
50V/DIV
V
OUT
20V/DIV
I
IN
200mA/DIV
4257fb
U
U
1
LTC4257
ABSOLUTE
(Notes 1, 2)
AXI U
RATI GS
Operating Ambient Temperature Range
LTC4257C ............................................... 0°C to 70°C
LTC4257I ............................................. –40°C to 85°C
Storage Temperature Range
S8 Package ....................................... – 65°C to 150°C
DD Package ...................................... – 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
V
IN
Voltage ............................................. 0.3V to – 100V
V
OUT
, PWRGD Voltage ............. V
IN
+ 100V to V
IN
– 0.3V
R
CLASS
Voltage ............................ V
IN
+ 7V to V
IN
– 0.3V
PWRGD Current .................................................. 10mA
R
CLASS
Current .................................................. 100mA
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC
1
R
CLASS
2
NC
3
V
IN
4
8
7
6
5
GND
NC
PWRGD
V
OUT
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 150°C,
θ
JA
= 150°C/W
ORDER PART NUMBER
LTC4257CS8
LTC4257IS8
S8 PART MARKING
4257
4257I
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF
Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN
PARAMETER
Supply Voltage
Maximum Operating Voltage
Signature Range
Classification Range
UVLO Turn-On Voltage
UVLO Turn-Off Voltage
IC Supply Current when ON
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
Voltage with Respect to GND Pin (Notes 4, 5, 6)
●
●
●
●
●
I
IN_ON
I
IN_CLASS
∆I
CLASS
V
IN
= – 48V, Pins 5, 6 Floating
IC Supply Current During Classification V
IN
= – 17.5V, Pin 2 Floating, V
OUT
Tied to GND
(Note 7)
Current Accuracy During Classification 10mA < I
CLASS
< 40mA, – 12.5V
≤
V
IN
≤
– 21V,
(Notes 8, 9)
2
U
U
W
W W
U
W
TOP VIEW
NC
R
CLASS
NC
V
IN
1
2
3
4
8
7
6
5
GND
NC
PWRGD
V
OUT
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD TO BE SOLDERED TO
ELECTRICALLY ISOLATED PCB HEATSINK
ORDER PART NUMBER
LTC4257CDD
LTC4257IDD
DD PART MARKING*
LACT
MIN
TYP
MAX
– 57
– 9.5
– 21
– 40.2
– 31.5
3
0.65
±3.5
UNITS
V
V
V
V
V
mA
mA
%
– 1.5
– 12.5
– 37.7
– 29.3
0.35
–39.2
–30.5
0.50
●
●
●
4257fb
LTC4257
ELECTRICAL CHARACTERISTICS
SYMBOL
R
SIGNATURE
V
PG_OUT
V
PG_THRES_FALL
V
PG_THRES_RISE
I
PG_LEAK
R
ON
I
OUT_LEAK
I
LIMIT
I
LIMIT_WARM
T
OVERTEMP
T
SHUTDOWN
Power Good Leakage
On-Resistance
V
OUT
Leakage
Input Current Limit
Overtemperature Input Current Limit
Overtemperature Trip Temperature
Thermal Shutdown Trip Temperature
PARAMETER
Signature Resistance
Power Good Output Low Voltage
Power Good Trip Point
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
–1.5V
≤
V
IN
≤
–9.5V, V
OUT
Tied to GND,
IEEE 802.3af 2-Point Measurement (Notes 4, 5)
I = 1mA, V
IN
= – 48V, PWRGD Referenced to V
IN
V
IN
= –48V, Voltage Between V
IN
and V
OUT
(Note 9)
V
OUT
Falling
V
OUT
Rising
V
IN
= 0V, PWRGD FET Off, V
PWRGD
= 57V
I = 300mA, V
IN
= – 48V, Measured from V
IN
to V
OUT
(Note 9)
V
IN
= 0V, Power MOSFET Off, V
OUT
= 57V (Note 10)
V
IN
= – 48V, V
OUT
= –43V (Note 11)
(Note 11)
(Note 11)
(Note 11)
●
●
●
●
●
MIN
23.25
TYP
MAX
26.00
0.5
UNITS
kΩ
V
V
V
µA
Ω
Ω
µA
mA
mA
°C
°C
1.3
2.7
1.5
3.0
1.0
1.7
3.3
1
1.6
2.0
150
400
●
●
●
300
350
188
120
140
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltages are with respect to GND pin.
Note 3:
The LTC4257 operates with a negative supply voltage in the range
of –1.5V to –57V. To avoid confusion, voltages in this data sheet are
always referred to in terms of absolute magnitude. Terms such as
“maximum negative voltage” refer to the largest negative voltage and a
“rising negative voltage” refers to a voltage that is becoming more
negative.
Note 4:
The LTC4257 is designed to work with two polarity protection
diodes between the PSE and PD. Parameter ranges specified in the
Electrical Characteristics are with respect to LTC4257 pins and are
designed to meet IEEE 802.3af specifications when these diode drops are
included. See Applications Information.
Note 5:
Signature resistance is measured via the 2-point
∆V/∆I
method as
defined by IEEE 802.3af. The LTC4257 signature resistance is offset from
25k to account for diode resistance. With two series diodes, the total PD
resistance will be between 23.75k and 26.25k and meet IEEE 802.3af
specifications. The minimum probe voltages measured at the LTC4257
pins are –1.5V and –2.5V. The maximum probe voltages are –8.5V and
–9.5V.
Note 6:
The LTC4257 includes hysteresis in the UVLO voltages to preclude
any start-up oscillation. Per IEEE 802.3af requirements, the LTC4257 will
power up from a voltage source with 20Ω series resistance on the first
trial.
Note 7:
I
IN_CLASS
does not include classification current programmed at
Pin 2. Total supply current in classification mode will be I
IN_CLASS
+ I
CLASS
(see Note 8).
Note 8:
I
CLASS
is the measured current flowing through R
CLASS
.
∆I
CLASS
accuracy is with respect to the ideal current defined as
I
CLASS
= 1.237/R
CLASS
. The current accuracy specification does not
include variations in R
CLASS
resistance. The total classification current for
a PD also includes the IC quiescent current (I
IN_CLASS
). See Applications
Information.
Note 9:
For the DD package, this parameter is assured by design and
wafer level testing.
Note 10:
I
OUT_LEAK
includes current drawn at the V
OUT
pin by the power
good status circuit. This current is compensated for in the 25kΩ signature
resistance and does not affect PD operation.
Note 11:
The LTC4257 includes smart thermal protection. In the event of
an overtemperature condition, the LTC4257 will reduce the input current
limit by 50% to reduce the power dissipation in the package. If the part
continues heating and reaches the shutdown temperature, the current is
reduced to zero until the part cools below the overtemperature limit. The
LTC4257 is also protected against thermal damage from incorrect
classification probing by the PSE. If the LTC4257 exceeds the
overtemperature trip point, the classification load current is disabled.
4257fb
3
LTC4257
TYPICAL PERFOR A CE CHARACTERISTICS
Input Current vs Input Voltage
25k Detection Range
0.5
T
A
= 25°C
50
0.4
INPUT CURRENT (mA)
INPUT CURRENT (mA)
INPUT CURRENT (mA)
0.3
0.2
0.1
0
0
–2
–4
–6
INPUT VOLTAGE (V)
Input Current vs Input Voltage
3
EXCLUDES ANY LOAD CURRENT
T
A
= 25°C
NORMALIZED UVLO THRESHOLD (%)
SIGNATURE RESISTANCE (kΩ)
INPUT CURRENT (mA)
2
1
0
–40
–50
–45
–55
INPUT VOLTAGE (V)
Power Good Output Low Voltage
vs Current
4
120
T
A
= 25°C
CURRENT LIMIT (mA)
V
OUT
CURRENT (µA)
3
V
PG_OUT
(V)
2
1
0
0
2
6
4
CURRENT (mA)
4
U W
–8
4357 G02
4257 G04
Input Current vs Input Voltage
T
A
= 25°C
CLASS 4
40
Input Current vs Input Voltage
12.0
11.5
11.0
10.5
10.0
9.5
85°C
–40°C
CLASS 1 OPERATION
30
CLASS 3
20
CLASS 2
CLASS 1
10
CLASS 0
–10
0
0
–10
–20
–30
–40
INPUT VOLTAGE (V)
–50
–60
9.0
–12
–14
–20
–18
–16
INPUT VOLTAGE (V)
–22
4257 G03
4257 G01
Signature Resistance
vs Input Voltage
28
RESISTANCE =
∆V
= V2 – V1
∆I
I
2
– I
1
27 DIODES: S1B
T
A
= 25°C
IEEE UPPER LIMIT
Normalized UVLO Threshold
vs Temperature
2
APPLICABLE TO TURN-ON
AND TURN-0FF THRESHOLDS
1
26
25
24
LTC4257 ONLY
23
22
V1: –1
V2: –2
IEEE LOWER LIMIT
LTC4257 + 2 DIODES
0
–1
–60
–3
–4
–7
–5
–8
–6
INPUT VOLTAGE (V)
–9
–10
4257 G05
–2
–40
–20
60
0
20
40
TEMPERATURE (°C)
80
4257 G06
V
OUT
Leakage Current
V
IN
= 0V
T
A
= 25°C
Current Limit vs Input Voltage
375
V
OUT
= V
IN
+ 5V
90
365
85°C
355
25°C
345
–40°C
335
60
30
0
8
10
4257 G07
0
40
V
OUT
PIN VOLTAGE (V)
20
60
42571 G09
325
–40
–50
–45
–55
INPUT VOLTAGE (V)
–60
4257 G09
4257fb
LTC4257
PI FU CTIO S
NC (Pin 1):
No Connect.
R
CLASS
(Pin 2):
External Class Select Input. Used to set the
current the LTC4257 maintains during classification. Con-
nect a resistor between R
CLASS
and V
IN
(see Table 2).
NC (Pin 3):
No Connect.
V
IN
(Pin 4):
Power Input. Tie to system – 48V through the
input diode bridge.
V
OUT
(Pin 5):
Power Output. Supplies – 48V to the PD load
through an internal power MOSFET that limits input cur-
rent. V
OUT
is high impedance until the input voltage rises
above the turn-on UVLO threshold. Above the UVLO
threshold the output is current limited to 350mA.
PWRGD (Pin 6):
Power Good Output, Open-Drain. Signals
that the LTC4257 MOSFET is fully on. Low impedance
indicates power is good. PWRGD is high impedance
during detection, classification and in the event of a
PCB设计
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