Freescale Semiconductor, Inc.
MPC823ETS/D
6/99
™
Freescale Semiconductor, Inc...
Technical Summary
MPC823e Mobile Computing Microprocessor
The MPC823e microprocessor is a versatile, one-chip integrated microprocessor and peripheral
combination that can be used in a variety of electronic products. It particularly excels in low-power,
portable, image capture and personal communication products. It is a version of the MPC823
microprocessor that provides enhanced performance with larger data and instruction caches. Like
the MPC823, it has a universal serial bus (USB) interface and video display controller, as well as
the existing LCD controller of the MPC823 (Rev A) device.
The MPC823e microprocessor integrates a high-performance embedded PowerPC
™
core with a
communication processor module that uses a specialized RISC processor for imaging and
communication. The communication processor module can perform embedded signal processing
functions for image compression and decompression. It also supports seven serial channels—two
serial communication controllers, two serial management controllers, one I
2
C
®
port, one USB
channel, and one serial peripheral interface.
This two-processor architecture consumes power more efficiently than traditional architectures
because the communication processor module frees the core from peripheral tasks like imaging and
communication.
This document contains information on a new product under development by Motorola. Motorola reserves the right to
change or discontinue this product without notice.
© Motorola, Inc., 1999. All rights reserved.
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
Key Features
The following list summarizes key features of the MPC823e:
•
Embedded PowerPC Core Provides 99MIPS (Using Dhrystone 2.1) or
172K Dhrystones 2.1 at 75MHz
— Single-Issue, 32-Bit Version of the PowerPC Core (Fully Compatible with the PowerPC
Architecture Definition) with 32 x 32-Bit Fixed-Point Registers
— Low Power Consumption, 3.3V I/O Boundary with Microprocessor Core, Caches,
Memory Management, and I/O in Operation
— Performs Branch Folding, Branch Prediction with Conditional Prefetch, without
Conditional Execution
— 8K Data Cache and 16K Instruction Cache
— Instruction Cache is Four-Way, Set Associative and the Data Cache is Two-Way,
Set-Associative, Physical Address, 4-Word Line Burst, LRU Replacement Algorithm,
Lockable Online Granularity
— Memory Management Units with 32-Entry Translation Lookaside Buffers (TLBs) and
Fully Associative Instruction and Data TLBs
— Memory Management Units Support Multiple Page Sizes of 4K, 16K, 512K and 8M
(1K Protection Granularity at the 4K Page Size); 16 Virtual Address Spaces and
16 Protection Groups
Advanced On-Chip Emulation Debug Mode
Data Bus Dynamic Bus Sizing for 8-,16-, and 32-Bit Buses
— Supports Traditional 68K Big-Endian, Traditional x86 Little-Endian, and PowerPC
Little-Endian Memory Systems
— Twenty-Six External Address Lines
Completely Static Design (0–75MHz Operation)
— External Bus Division Factor (EBDF) Should be Divided by 2 for Frequencies Greater
than 50MHz
Communication Processor Module
— Interfaces to PowerPC Core through On-Chip Dual-Access RAM and Virtual (Serial)
DMA Channels on a Dedicated DMA Accelerator
— Programmable Memory-to-Memory and Memory-to-I/O (including Flyby) DMA
Provided by Virtual DMA Support
— CPM Provides 75+MIPS @ 75MHz in Parallel with PowerPC Core
— Protocols Supported by ROM or Download Microcode and the Hardware Serial
Communication Controllers Include, but are not Limited to, the Digital Portions of:
– Ethernet/IEEE 802.3 (CS/CDMA)
– HDLC/SDLC and HDLC Bus
– AppleTalk
®
– Universal Asynchronous Receiver Transmitter (UART)
– Synchronous UART (USART)
– Totally Transparent Mode With/Without CRC
– Asynchronous HDLC
– IrDA Version 1.1 Serial Infrared (SCC2 only)
– Basic Rate ISDN (BRI) in Conjunction with Serial Management
Controller Channels
– Primary Rate ISDN
Freescale Semiconductor, Inc...
•
•
•
•
2
MPC823e Mobile Computing Microprocessor
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
— 16 x 16-Bit Multiply-Accumulate (MAC) Hardware
– One Operation Per Clock
– Two Clock Latency and One Clock Blockage
– Operates Concurrently with Other Instructions
– Uses DMA Controller to Burst Data Directly into Register File without Interacting
with the PowerPC Core
— 8K Dual-Port RAM
— Twelve Serial DMA (SDMA) Channels
— 32-Bit, Harvard Architecture, Scalar RISC Microcontroller
— Communication-Specific Commands
— Supports Continuous-Mode Transmission and Reception on All Serial Channels
— Each Serial Channel has Externally Accessible Pins
Four Baud Rate Generators
— Independent and Can be Connected to a Serial Communication Controller or Serial
Management Controller
— Allows Changes During Operation
— Autobaud Support Option
Two Serial Communication Controllers (SCCs)
— Ethernet/IEEE 802.3 Support (10Mbps and Full-Duplex Operation)
— GeoPort Support
— HDLC Bus Implements an HDLC-Based Local Area Network
— Universal Asynchronous Receiver Transmitter
— Synchronous UART
— Serial Infrared (IrDA) Supporting a Maximum of 4Mbps (SCC2 Only)
— Totally Transparent. Frame-Based with Optional Cyclical Redundancy Check
— Maximum Serial Data Rate of 35Mbps
One Dedicated High-Speed Serial Channel for the Universal Serial Bus (USB)
— Supports USB Host/Slave Modes at a Maximum of 12Mbps with Four USB Endpoints
Two Serial Management Controllers (SMCs) with Externally Accessible Pins
— UART
— Transparent
— General Circuit Interface (GCI) Controller
— Can Be Connected to the Time-Division Multiplexed (TDM) Channel
One Serial Peripheral Interface
— Supports Master and Slave Modes
— Supports Multimaster Operation on the Same Bus
One I
2
C Port
— Supports Master and Slave Modes
— Supports Multimaster Environments
— Supports High-Speed Operation
— Supports 7-Bit Addressing
•
Freescale Semiconductor, Inc...
•
•
•
•
•
MOTOROLA
MPC823e Mobile Computing Microprocessor
For More Information On This Product,
Go to: www.freescale.com
3
Freescale Semiconductor, Inc.
•
Serial Interface with the Two Time-Slot Assigners
— Allows Serial Communication Controllers and Serial Management Controllers to be
Used in Multiplexed and/or Nonmultiplexed Operation
— Supports T1, CEPT, PCM Highway, ISDN Basic Rate, ISDN Primary Rate,
User-Defined
— 1- or 8-Bit Resolution
— Allows Independent Transmit and Receive Routing, Frame Syncs, and Clocking
— Allows Dynamic Changes
— Can be Internally Connected to Four Serial Channels
General-Purpose Timers
— Four 16-Bit Timers or Two 32-Bit Timers
— Gate Mode Can Enable/Disable Counting
— Interrupt can be Masked on Reference Match and Event Capture
Interrupts
— Seven External Interrupt Request (IRQ) Lines
— One Nonmaskable Interrupt
— Twelve Port Pins with Interrupt Capability
— Ten Internal Interrupt Sources
— Programmable Highest Priority Request
Memory Controller (Eight Banks)
— Can be Programmed to Support Almost any Memory Interface
— Each Bank Can be a Chip-Select or RAS to Support a DRAM Bank
— A Maximum of 30 Wait States per Memory Bank Can be Programmed
— Glueless Interface to DRAM Single In-Line Memory Modules, Static RAM,
Electrically Programmable Read-Only Memory, Flash EPROM, or Synchronous
DRAM
— Four CAS Lines, Four WE Lines, and One OE Line
— Boot Chip-Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
— Variable Block Sizes—32K to 256M
— Selectable Write Protection
— On-Chip Bus Arbitration Supports External Bus Master
— Special Features for Burst Mode Support
System Integration Unit
— Hardware Bus Monitor
— Spurious Interrupt Monitor
— Software Watchdog Timer
— Periodic Interrupt Timer
— Low-Power Stop Mode
— Clock Synthesizer
— PowerPC Decrementer and Timebase
— Real-Time Clock
— Reset Controller
— IEEE 1149.1 Test Access Port (JTAG)
•
Freescale Semiconductor, Inc...
•
•
•
4
MPC823e Mobile Computing Microprocessor
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
•
Video/LCD Controller
— Video Controller
– Supports Digital NTSC/PAL Video Encoders and Digital TFT
– Sequential RGB, 4:4:4, and 4:2:2 YC
r
C
b
(CCIR 601) Digital Component
Video Formats
– CCIR-656 Compatible 8-Bit Interface Port
– Horizontal Sync, Vertical Sync, Field and Blanking Timing
– Generation with Half-Clock Resolution and Programmable Polarity
– Supports Interlace/Noninterlace Scanning Methods
– Programmable Display Active Area
– Programmable Background Color for Inactive Area
– Glueless Interface for Most Digital Video Encoders
– Hardware Horizontal Scrolling
– Uses Burst Read DMA Cycles for Maximum Bus Performance
– Panel Voltage Control Adjustments for Contrast Set with On-Chip Timers
– End-of-Frame Interrupt Generation
— LCD Controller
– Supports Digital TFT and Passive LCD Panels
– Horizontal Sync, Vertical Sync, Field and Blanking Timing
– Generation with Half-Clock Resolution and Programmable Polarity
– 1-, 2-, or 4-Bit Per Pixel Grayscale Mode Using Advanced Frame Rate Control
Algorithm
– Four or Eight Bits Per Pixel Color Mode
– 4-, 8-, 9-, or 12-Bit Parallel Output to LCD Displays
– Programmable Display Active Area
– Non-Split or Vertically Split Screen Support
– Uses Burst Read DMA Cycles for Maximum Bus Performance
– End-of-Frame Interrupt Generation
– Data for Splits—2+2 or 4+4 Parallel Bits (x+x Refers to x Bits Each for Lower and
Upper Screens in Parallel)
– Built-In Color RAM with 256 12-Bit Entries
– Programmable Wait Time Between Lines and Frames
– Panel Voltage Control Adjustments for Contrast Set with On-Chip Timers
– Programmable Polarity for All LCD Interface Signals
Single-Socket PCMCIA-ATA Interface
— Master Interface, Release 2.1 Compliant
— Single PCMCIA Socket
— Eight Memory or I/O Windows Available
— Eight General-Purpose I/O Pins and Two General-Purpose Output-Only Pins are
Available when the PCMCIA Controller is Not in Operation
Freescale Semiconductor, Inc...
•
MOTOROLA
MPC823e Mobile Computing Microprocessor
For More Information On This Product,
Go to: www.freescale.com
5
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