TECHNICAL NOTE
HIGH GRADE Specification HIGH RELIABILITY series
SPI BUS Serial EEPROMs
☆
Supply voltage 2.5V~5.5V
Operating temperature -40°C ~ +125°C type
☆
: Under development
●Description
BR25H
□□□
-W series is a serial EEPROM of SPI BUS interface method.
BR25H010-W, BR25H020-W, BR25H040-W, BR25H080-W, BR25H160-W, BR25H320-W
☆
●Features
●
High speed clock action up to 5MHz (Max.)
●
Wait function by HOLDB terminal.
●
Part or whole of memory arrays settable as read only memory area by program.
●
2.5½5.5V single power source action most suitable for battery use.
●
Page write mode useful for initial value write at factory shipment.
●
Highly reliable connection by Au pad and Au wire.
●
For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)
●
Auto erase and auto end function at data rewrite.
●Page
write
●
Low current consumption
Number of
pages
At write action (5V)
: 1.5mA (Typ.)
At read action (5V)
: 1.0mA (Typ.)
Product
At standby action (5V) : 0.1μA (Typ.)
number
●
Address auto increment function at read action
●
Write mistake prevention function
Write prohibition at power on.
Write prohibition by command code (WRDI).
Write prohibition by WPB pin.
Write prohibition block setting by status registers (BP1, BP0)
Write mistake prevention function at low voltage.
●
SOP8, SOP-J8 Package
●
Data at shipment Memory array: FFh, status register WPEN, BP1, BP0 : 0
●
Data kept for 40 years.
●
Data rewrite up to 1,000,000times.
16 Byte
BR25H010-W
BR25H020-W
BR25H040-W
32 Byte
BR25H080-W
BR25H160-W
BR25H320-W
●BR25H
series
Capacity
1Kbit
2Kbit
4Kbit
8Kbit
16Kbit
32Kbit
Bit format
128×8
256×8
512×8
1K×8
2K×8
4Kx8
Type
BR25H010-W
BR25H020-W
BR25H040-W
BR25H080-W
BR25H160-W
BR25H320-W
Power source
voltage
2.5~5.5V
2.5~5.5V
2.5~5.5V
2.5~5.5V
2.5~5.5V
2.5~5.5V
SOP8
●
●
●
●
●
●
SOP-J8
●
●
●
●
●
●
Ver A. Aug. 2007
●Absolute
maximum ratings (Ta=25°C)
Parameter
Impressed voltage
Permissible
dissipation
Storage
temperature range
Operating
temperature range
Terminal voltage
●Recommended
action conditions
Unit
Parameter
Symbol
Symbol
Limits
Vcc
Pd
Tstg
Topr
–
-0.3~+6.5
450(SOP8)
450(SOP-J8)
-65~150
-40~125
-0.3~Vcc+0.3
V
*1
*2
mW
°C
°C
V
Power source voltage
Input voltage
Vcc
Vin
Limits
2.5
~
5.5
Unit
0~Vcc
V
●Input
/ output capacity (Ta=25°C, frequency=5MHz)
Parameter
Input capacity
Output capacity
ж
1
ж
1
Symbol
Conditions
V
IN
=GND
V
OUT
=GND
Min.
Max.
Unit
・When
using at Ta=25℃ or higher, 3.6mW (*1,*2) to be reduced per 1℃
C
IN
C
OUT
–
–
8
8
pF
●Memory
cell characteristics (Vcc=2.5V½5.5V)
Parameter
Number of data
rewrite times
ж1
Data hold years
ж1
*1: Not 100% TESTED
Min
1,000,000
500,000
300,000
40
20
Limits
Typ.
-
-
-
-
-
Max
-
-
-
-
-
Unit
Times
Times
Times
Years
Years
ж
Condition
Ta
≤
85℃
Ta
≤
105℃
Ta
≤
125℃
Ta
≤
25°C
Ta
≤
85°C
1:Not 100% TESTED
●Electrical
characteristics (Unless otherwise specified, Ta=-40~+125°C, Vcc=2.5~5.5V)
Parameter
“H” input voltage
“L” output voltage
“L” output voltage
“H” output voltage
Input leak current
Output lead current
Symbol
VIH
VIL
VOL
VOH
ILI
ILO
I
CC
1
Current consumption at write
action
I
CC
2
–
–
3.0
mA
Min.
0.7x
Vcc
-0.3
0
Vcc
-0.5
-10
-10
–
Limits
Typ. Max.
Vcc
–
+0.3
0.3x
–
Vcc
–
0.4
–
–
–
–
Vcc
10
10
2.0
Unit
V
V
V
V
μA
μA
mA
2.5≤Vcc≤5.5V
2.5≤Vcc≤5.5V
IOL=2.1mA
IOH=-0.4mA
V
IN
=0~Vcc
V
OUT
=0~Vcc, CSB=Vcc
Vcc=2.5V,fSCK=5MHz, tE/W=5ms
VIH/VIL=0.9Vcc/0.1Vcc,
Byte write, Page write
Write status regisuter
Vcc=5.5V,fSCK=5MHz, tE/W=5ms
VIH/VIL=0.9Vcc/0.1Vcc
Byte write, Page write
Write status register
Vcc=2.5V,fSCK=5MHz
VIH/VIL=0.9Vcc/0.1Vcc,
Read, Read status register
Vcc=5.5V,fSCK=5MHz
VIH/VIL=0.9Vcc/0.1Vcc
Read, Read status register
Vcc=5.5V
CSB=HOLDB=WPB=Vcc, SCK=SI=Vcc or =GND, SO=OPEN
・Radiation
resistance design is not made
Conditions
I
CC
3
Current consumption at read
action
I
CC
4
Standby current
ISB
–
–
1.5
mA
–
–
–
–
2.0
10
mA
μA
●Block
diagram
CSB
SCK
VOLTAGE
INSTRUCTION DECODE
CONTROL CLOCK
GENERATION
WRITE
INHIBITION
HIGH VOLTAGE
GENERATOR
DETECTION
*1
SI
HOLDB
INSTRUCTION
REGISTER
ADDRESS
REGISTER
7½12bit *1
STATUS REGISTER
ADDRESS
DECODER
READ/WRITE
AMP
7½12bit *1
1½32K
EEPROM
7bit: BR25H010-W
8bit: BR25H020-W
9bit: BR25H040-W
10bit: BR25H080-W
11bit: BR25H160-W
12bit: BR25H320-W
WPB
SO
DATA
REGISTER
8bit
8bit
Fig.1 Block diagram
2/16
●Pin
assignment and description
Vcc
HOLDB SCK
SI
BR25H010-W
BR25H020-W
BR25H040-W
BR25H080-W
BR25H160-W
BR25H320-W
Terminal name
Vcc
GND
CSB
SCK
SI
SO
HOLDB
Input/Output
–
–
Input
Input
Input
Output
Input
Function
Power source to be connected
All input / output reference voltage, 0V
Chip select input
Serial clock input
Start bit, ope code, address, and serial data input
Serial data output
Hold input
Command communications may be suspended temporarily
(HOLD status)
CSB
SO
WPB
GND
WPB
Input
Fig.2 Pin assignment diagram
Write protect input
Write command is prohibited
*1
Write status register command is prohibited.
*1:BR25H010/020/040-W
●Operating
timing characteristics
(Ta=-40~+125°C, unless otherwise specified, load capacity C
L1
=100pF)
2.5≤Vcc≤5.5V
Parameter
Symbol
Unit
Min. Typ. Max
SCK frequency
fSCK
–
–
5
MHz
SCK high time
85
–
–
ns
tSCKWH
SCK low time
85
–
–
ns
tSCKWL
CSB high time
tCS
85
–
–
ns
CSB setup time
tCSS
90
–
–
ns
CSB hold time
tCSH
85
–
–
ns
SCK setup time
90
–
–
ns
tSCKS
SCK hold time
90
–
–
ns
tSCKH
SI setup time
tDIS
20
–
–
ns
SI hold time
tDIH
30
–
–
ns
tPD1
–
–
70
ns
Data output delay time1
Data output delay time1
●
Sync data input / output
timing
tCS
tCSS
CSB
tSCKS
tSCKWL
tSCKWH
tRC
tFC
SCK
tDIS tDIH
SI
SO
High-Z
Fig.3 Input timing
SI is taken into IC inside in sync with data rise edge of SCK.
Input address and data from the most significant bit MSB.
tCS
CSB
SCK
SI
tPD
tCSH tSCKH
(C
L2
=30pF)
Output hold time
Output disable time
HOLDB setting
setup time
HOLDB setting
hold time
HOLDB release
setup time
HOLDB release
hold time
Time from HOLDB
to output High-Z
Time from HOLDB
To output change
SCK rise time
SCK fall time
OUTPUT
rise time
OUTPUT
fall time
Write time
tPD2
tOH
tOZ
tHFS
tHFH
tHRS
tHRH
tHOZ
tHPD
–
0
–
0
40
0
70
–
–
–
–
–
–
–
Ж
–
–
–
–
–
–
–
–
–
–
–
–
–
–
55
–
100
–
–
–
–
100
70
1
1
50
50
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ns
ms
tOH
tRO,tFO
tOZ
SO
High-Z
Fig.4 Input / Output timing
SO is output in sync with data fall edge of SCK. Data is output
from the most significant bit MSB.
CSB
"H"
"L"
tHFS
tHFH
tHRS tHRH
SCK
tDIS
SI
n+1
tHOZ
High-Z
tHPD
n
n-1
SO
Dn+1
Dn
Dn
Dn-1
HOLDB
Ж
Ж
Ж
1
1
1
tRC
tFC
tRO
tFO
tE/W
Fig.5 HOLD timing
Ж
1
1 NOT 100% TESTED
●AC
measurement conditions
Parameter
Load capacity 1
Load capacity 2
Input rise time
Input fall time
Input voltage
Input / Output judgment voltage
Symbol
C
L1
C
L2
–
–
–
–
Limits
Min. Typ. Max
–
–
100
–
–
30
–
–
50
–
–
50
0.2Vcc/0.8Vcc
0.3Vcc/0.7Vcc
3/16
Unit
pF
pF
ns
ns
V
V
●Characteristic
data (The following characteristic data are Typ. Values.)
6
5
4
VIH[V]
3
2
1
0
0
1
2
3
Vcc[V]
4
5
6
6
1
Ta=-40℃
Ta=25℃
Ta=125℃
VIL[V]
5
4
Ta=-40℃
Ta=25℃
Ta=125℃
VOL[V]
0.8
0.6
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
3
2
1
0
0
1
2
3
Vcc[V]
4
5
6
SPEC
0.4
0.2
SPEC
0
0
1
2
3
IOL[mA]
4
5
6
Fig.6
"H"
input voltage VIH(CSB,SCK,SI,HOLDB,WPB)
2.6
2.5
2.4
2.3
VOH[V]
2.2
2.1
2
1.9
1.8
0
0.4
IOH[mA]
0.8
1.2
ILI[μA]
8
6
4
2
0
12
Fig.7
"L"
input voltage VIL(CSB,SCK,SI,HOLDB,WPB)
12
Fig.8 "L" output voltage VOL-IOL(Vcc=2.5V)
SPEC
10
10
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
ILO[μA]
2
3
Vcc[V]
4
5
6
Ta=-40℃
Ta=25℃
Ta=125℃
8
6
4
2
0
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
0
1
0
1
2
3
VOUT[V]
4
5
6
Fig.9 "H" output voltage VOH-IOH(Vcc=2.5V)
4
Fig.10 Input leak current ILI(CSB,SCK,SI,HOLDB,WPB)
2.5
12
Fig.11 Output leak current ILO(SO)(Vcc=5.5V)
ICC3,4(READ)[mA]
3
ICC1,2[mA]]
fSCK=5MHz
DATA=00h
SPEC
SPEC
2
1.5
1
0.5
fSCK=5MHz
DATA=AAh
SPEC
SPEC
10
8
ISB[μA]
6
4
2
0
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
2
1
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
0
1
2
3
Vcc[V]
4
5
6
Fig.12 Current consumption at WRITE operation
ICC1,2
100
Fig.13 Consumption Current at READ operation
ICC3,4
100
80
tSCKWH [ns]
100
Fig.14 Consumption current at standby operation ISB
SPEC
tSCKWL [ns]
80
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
10
fSCK[MHz]
60
40
20
0
SPEC
1
Ta=-40℃
Ta=25℃
Ta=125℃
60
Ta=-40℃
Ta=25℃
Ta=125℃
40
20
0.1
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
0
1
2
3
Vcc[V]
4
5
6
Fig.15 SCK frequency fSCK
100
100
Fig.16 SCK high time tSCKWH
100
Fig.17 SCK low time tSCKWL
80
SPEC
tCSS[ns]
80
SPEC
tCSH[ns]
80
tCS[ns]
60
Ta=-40℃
Ta=25℃
Ta=125℃
60
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
60
40
40
40
20
20
20
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
Fig.18 CSB high time tCS
Fig.19 CSB setup time tCSS
Fig.20 CSB hold time tCSH
4/16
30
50
100
20
Ta=-40℃
Ta=25℃
Ta=125℃
40
Ta=-40℃
Ta=25℃
Ta=125℃
tPD1 [ns]
80
SPEC
SPEC
tDIH[ns]
30
tDIS[ns]
10
SPEC
60
0
20
40
-10
10
20
Ta=-40℃
Ta=25℃
Ta=125℃
-20
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
Fig.21 SI setup time tDIS
100
120
Fig.22 SI hold time tDIH
3
Vcc[V]
4
5
6
Fig.23 Data output delay time tPD1(CL=100pF)
80
80
Ta=-40℃
Ta=25℃
Ta=125℃
100
SPEC
60
SPEC
tOZ [ns]
80
60
40
Ta=-40℃
Ta=25℃
Ta=125℃
tHFH [ns]
tPD2 [ns]
60
Ta=-40℃
Ta=25℃
Ta=125℃
40
SPEC
20
40
20
20
0
0
1
2
3
Vcc[V]
4
5
6
0
1
2
3
Vcc[V]
4
5
6
0
0
-20
0
1
2
3
Vcc[V]
4
5
6
Fig.24 Data output delay time tPD2(CL-30pF)
80
120
100
Fig.25 Output disable time tOZ
80
Fig.26 HOLDB setting hold time tHFH
60
tHOZ [ns]
60
40
tHPD [ns]
tHRH [ns]
40
Ta=-40℃
Ta=25℃
Ta=125℃
60
SPEC
80
SPEC
40
SPEC
20
20
0
20
0
0
1
2
3
Vcc[V]
4
5
6
0
Ta=-40℃
Ta=25℃
Ta=125℃
0
Ta=-40℃
Ta=25℃
Ta=125℃
-20
-20
1
2
3
Vcc[V]
4
5
6
0
1
2
3
Vcc[V]
4
5
6
Fig.27 HOLDB release hold time tHRH
100
Fig.28 Time from HOLDB to output High-Z tHOZ
100
Fig.29 Time from HOLDB to output change tHPD
8
80
Ta=-40℃
Ta=25℃
Ta=125℃
tFO [ns]
80
Ta=-40℃
Ta=25℃
Ta=125℃
tE/W[ms]
6
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
tRO [ns]
60
60
4
40
SPEC
40
SPEC
20
20
2
Ta=125℃
Ta=-40℃
Ta=25℃
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
0
0
1
2
3
Vcc[V]
4
5
6
Fig.30 Output rise time tRO
Fig.31 Output fall time tFO
Fig.32 Write cycle time tE/W
5/16
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
