BTA12, BTB12, T1205
T1210, T1235, T1250
Datasheet
12 A Snubberless™, logic level and standard Triacs
A2
Features
•
•
•
•
•
•
A1
A2
G
G
A1
A2
Medium current Triac
Low thermal resistance with clip bonding
Low thermal resistance insulation ceramic for insulated BTA
High commutation (4Q) or very high commutation (3Q) capability
BTA series UL1557 certified (file ref: 81734)
Packages are RoHS (2011/65/EU) compliant
A2
A1
G
TO-220AB
A2
TO-220AB Ins.
Description
Available either in through-hole or surface mount packages, the BTA12, BTB12 and
T12xx Triac series are suitable for general purpose mains power AC switching. They
can be used as ON/OFF function in applications such as static relays, heating
regulation or induction motor starting circuit. They are also recommended for phase
control operations in light dimmers and appliance motors speed controllers.
The Snubberless™ versions (W suffix and T12xx) are especially recommended for
use on inductive loads, because of their high commutation performance. By using an
internal ceramic pad, the Snubberless™ series provide an insulated tab (rated at
2500 V
RMS
) complying with UL standards (file reference: E81734).
Logic Level BTA12-600TW and BTA12-600SW offer low holding current, ideal to
design light dimmers for LED lamps.
D²PAK
A2
A1
G
Product status link
BTA12
BTB12
T1205
T1210
T1235
T1250
Product summary
I
T(RMS)
V
DRM
/V
RRM
I
GT
(Snubberless)
I
GT
(standard)
12 A
600 and 800 V
5 / 10 / 35 / 50 mA
25 / 50
DS2115
-
Rev 11
-
August 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
BTA12, BTB12, T1205, T1210, T1235, T1250
Characteristics
1
Characteristics
Table 1.
Absolute maximum ratings (T
j
= 25 °C unless otherwise stated)
Symbol
I
T(RMS)
RMS on-state current (full sine wave)
Parameter
TO-220AB, D²PAK T
c
= 105 °C
TO-220AB Ins.
T
c
= 90 °C
t = 20 ms
t
p
= 16.7 ms
t
p
= 10 ms
f = 120 Hz
t
p
= 10 ms
t
p
= 20 µs
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
Value
12
120
126
78
50
V
DRM
/ V
RRM
+
100
4
1
-40 to +150
-40 to +125
Unit
A
I
TSM
I
2
t
dl/dt
Non repetitive surge peak on-state current (full cycle, T
j
f = 50 Hz
initial = 25 °C)
f = 60 Hz
I
2
t value for fusing
Critical rate of rise of on-state current I
G
= 2 x I
GT
, tr ≤
100 ns
A
A
2
s
A/µs
V
DSM
/V
RSM
Non repetitive surge peak off-state voltage
I
GM
P
G(AV)
T
stg
T
j
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
V
A
W
°C
°C
Table 2.
Electrical characteristics (T
j
= 25 °C, unless otherwise specified) - Snubberless™ and logic level
(3 quadrants)
T1205
Symbol
Parameter
Quadrant
T1210
T1235
BTB12-
CW
T1250
BTB12-
BW
Unit
BTB12-TW BTB12-SW
BTA12-TW BTA12-SW
BTA12-CW BTA12-BW
35
50
mA
V
V
35
50
60
500
50
70
80
1000
mA
mA
V/µs
I
GT
(1)
V
GT
V
GD
I
H
(2)
I
L
(2)
dV/dt
(2)
V
D
= 12 V, R
L
= 30 Ω
V
D
= V
DRM
, R
L
= 3.3 kΩ, T
j
= 125 °C
I
T
= 100 mA
I
G
= 1.2 x I
GT
I - II - III
I - II - III
I - II - III
I - II - III
I - III
II
Max.
Max.
Min.
Max.
Max.
Max.
Max.
Min.
Min.
Min.
5
10
1.3
0.2
10
10
15
20
3.5
1.0
15
25
30
40
6.5
2.9
V
D
= 67% V
DRM
, gate open, T
j
= 125 °C
(dV/dt)c = 0.1 V/µs, T
j
= 125 °C
(dl/dt)c
(2)
(dV/dt)c = 10 V/µs, T
j
= 125 °C
Without snubber, T
j
= 125 °C
1. Minimum I
GT
is guaranteed at 5 % of I
GT
max.
2. For both polarities of A2 referenced to A1
A/ms
6.5
12
DS2115
-
Rev 11
page 2/16
BTA12, BTB12, T1205, T1210, T1235, T1250
Characteristics
Table 3.
Electrical characteristics (T
j
= 25 °C, unless otherwise specified) - Standard Triac (4 quadrants)
Symbol
Parameter
Quadrant
I - II - III
V
D
= 12 V, R
L
= 30 Ω
IV
All
V
D
= V
DRM
, R
L
= 33 kΩ, T
j
= 125 °C
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 % V
DRM
gate open, T
j
= 125 °C
(dI/dt)c = 5.3 A/ms, T
j
= 125 °C
All
I - II - III
I - III - IV
II
Value
C
Max.
Max.
Min.
Max.
Max.
Min.
Min.
25
40
80
200
5
25
50
1.3
0.2
50
50
100
400
10
B
50
100
Unit
I
GT
(1)
V
GT
V
GD
I
H
(2)
I
L
dV/dt
(2)
(dV/dt)c
(2)
mA
V
V
mA
mA
V/µs
V/µs
1. Minimum I
GT
is guaranteed at 5 % of I
GT
max.
2. For both polarities of A2 referenced to A1
Table 4.
Static electrical characteristics
Symbol
V
TM
(1)
V
TO
(1)
R
D
(1)
I
DRM
I
RRM
I
TM
= 17 A, t
p
= 380 µs
threshold on-state voltage
Dynamic resistance
V
DRM
= V
RRM
Test conditions
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
Max.
Max.
Max.
Max.
Max.
Value
1.55
0.85
35
5
1
Unit
V
V
mΩ
µA
mA
1. For both polarities of A2 referenced to A1
Table 5.
Thermal resistance
Symbol
R
th(j-c)
Parameter
Max. junction to case thermal resistance (AC)
Junction to ambient
Junction to ambient
S = 2 cm²
(1)
D
2
PAK / TO-220AB
TO-220AB insulated
D²PAK
TO-220AB / TO-220AB insulated
Max.
Max.
Typ.
Typ.
Value
1.4
2.3
45
60
Unit
°C/W
R
th(j-a)
°C/W
1. S = Copper surface under tab.
DS2115
-
Rev 11
page 3/16
BTA12, BTB12, T1205, T1210, T1235, T1250
Characteristics (curves)
1.1
Characteristics (curves)
Figure 2.
RMS on-state current versus case temperature
(full cycle)
Figure 1.
Maximum power dissipation versus on-state
RMS current (full cycle)
16
14
12
10
8
6
4
2
0
P(W)
IT(RMS)(A)
0
1
2
3
4
5
6
7
8
9
10
11
12
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IT(RMS)(A)
BTB /T 12
BTA
T
C
( °C )
0
25
50
75
100
125
Figure 3.
RMS on-state current versus ambient
temperature (printed circuit board FR4, copper thickness:
35 μm) (full cycle)
Figure 4.
Relative variation of thermal impedance versus
pulse duration
3.5
3.0
2.5
2.0
1.5
1.0
0.5
IT(RMS)(A)
D
2
PAK
(S = 1 cm
2
)
1E+0
K = [Z
th
/R
th
]
Z
th(j-c)
Z
th(j-a)
1E-1
T
C
(°C )
0.0
0
25
50
75
100
125
1E-2
1E-3
1E-2
1E-1
tP( s)
1E+0
1E+1
1E+2
5E+2
DS2115
-
Rev 11
page 4/16
BTA12, BTB12, T1205, T1210, T1235, T1250
Characteristics (curves)
Figure 5.
On-state characteristics (maximum values)
Figure 6.
Surge peak on-state current versus number of
cycles
100
ITM(A)
T
j
max.
V
to
= 0.85V
R
d
= 35 mΩ
T
j
= T
j
max.
10
T
j
= 25°C.
1
0.5
1.0
1.5
2.0
VTM (V)
2.5
3.0
3.5
4.0
4.5
5.0
130
120
110
100
90
80
70
60
50
40
30
20
10
0
ITSM(A)
t=20ms
Non repetitive
T
j
initial = 25°C
One cy cle
Repetitive
T
C
= 90°C
Numb er o
f
cycles
1
10
100
1000
Figure 7.
Non repetitive surge peak on-state current for a
sinusoidal pulse
Figure 8.
Relative variation of gate trigger current holding
current and latching current versus junction temperature
(typical values)
ITSM(A)
1000
dI/dt limitation:
50A/µs
T
j
initial = 25°C
2.5
IGT, IH, IL[Tj] / IGT, IH, IL[Tj = 25 °C]
I
TSM
2.0
I
GT
100
1.5
I
H
& I
L
1.0
for a sinusoidal pulse with width tP < 10 ms
tP (ms)
0.5
10
0.01
0.10
1.00
10.00
0.0
-40
Tj(°C)
-20
0
20
40
60
80
100
120
140
DS2115
-
Rev 11
page 5/16
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
