PLL602-20
200MHz XO IC With Selectable 4X/8X Multiplier
FEATURES
•
•
•
•
•
•
•
•
•
Integrated crystal oscillator circuitry (XO).
Very low Jitter and Phase Noise (-110dBc @
10kHz offset)
Selectable frequency multiplication (x4, x8).
Accepts Fundamental Crystal input of 10MHz-30MHz
Output Frequency: up to 200MHz CMOS
Output enable (OE) pin with 60KΩ pull up
resistor
Operating temperature range from 0°C to 70°C
2.5 or 3.3V supply voltage.
Available in Green/RoHS compliant 8-pin SOIC
package
PIN CONFIGURATION
XIN/FIN
GND
SEL X/8X
4
CLK
1
8
XOUT
OE
NC
VDD
PLL602-20
2
3
4
7
6
5
DESCRIPTION
The PLL602-20 is a general purpose low jitter and
low phase noise (-110dBc @10kHz offset), high
performance CMOS XO IC. This flexible device can
be used as a XO with output frequencies ranging
from F
XIN
x 4 to F
XIN
x 8 with the use of a single
selector pin. This makes the PLL602-20 the ideal
high performance, low-cost solution for a wide range
of applications requiring up to 200MHz (including
77.76MHz, 125MHz and 155.52MHz).
PAD LAYOUT AND DIE ID
XIN
GND
GND
SEL4X/8X
1
2
3
7
4
5
6
VDD
VDD
9
8
XOUT
OE
CLK
BLOCK DIAGRAM
SELx4x/8
XIn
XO
XOut
DIE SPECIFICATION
Name
Size
Selectable
Value
31.5x55.1 mil
GND
80 micron x 80 micron
10 mil
PLL
CLK
Reverse side
Pad Opening
Die Thickness
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 02/18/05 Page 1
PLL602-20
200MHz XO IC With Selectable 4X/8X Multiplier
PIN/PAD ASSIGNMENT and DESCRIPTION
Name
XIN/FIN
GND
Pin #
1
2
Pad #
1
2
3
Die Pads
X (µm)
101.5
101.5
101.5
Y(µm)
1274.0
1075.0
878.4
Type
I
P
Description
Crystal or Reference Input Pin.
GND connection.
Multiplier Selector Pin with 60KΩ pull-up resistor.
SEL4X/8X
3
4
101.5
671.8
O
Logic State
0
1(default)
Clock Output.
VDD connection.
Do Not Connect.
Multiplier
x4
x8
CLK
VDD
DNC
OE
XOUT
4
5
6
7
8
5
6
7
-
8
9
101.5
697
697
-
697
697
425.0
483.0
790.0
-
1024.0
1274.0
O
P
-
O
O
Output Enable: ‘0’ to disable (tri-state output), 1’
(default value when not connected) to enable the
output (internal (60KΩ pull up resistor).
Crystal output.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 02/18/05 Page 2
PLL602-20
200MHz XO IC With Selectable 4X/8X Multiplier
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Soldering Temperature (Green package)
Storage Temperature
Ambient Operating Temperature
T
S
-65
0
SYMBOL
V
DD
V
I
V
O
MIN.
MAX.
4.6
V
DD
+
0.5
V
DD
+
0.5
260
150
70
UNITS
V
V
V
°C
°C
°C
-
0.5
-
0.5
-
0.5
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
AC SPECIFICATIONS
PARAMETERS
Crystal Input Frequency(XIN)
CONDITIONS
Fundamental Crystal
At power-up (after VDD increases over
1.62V)
15pF Load, 10/90%VDD
15pF Load, 90/10%VDD
At VDD/2
With capacitive decoupling between VDD
and GND. Operating only one output.
MIN.
10
TYP.
MAX.
30
UNITS
MHz
Settling Time
Output Rise Time
Output Fall Time
Duty Cycle
Period Jitter, peak-to-peak*
(measured from 10,000
samples)
10
1.2
1.2
45
50
70
2.0
2.0
55
ms
ns
ns
%
ps
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 02/18/05 Page 3
PLL602-20
200MHz XO IC With Selectable 4X/8X Multiplier
DC SPECIFICATIONS
PARAMETERS
Supply Current, Dynamic, with
Loaded Outputs
Operating Voltage
Output Low Voltage
Output High Voltage
Output Current
Short-circuit Current
SYMBOL
I
DD
V
DD
V
OL
V
OH
I
OSD
I
S
CONDITIONS
At 80MHz, load=15pF,
VDD=3.3V
MIN.
TYP.
MAX.
15
UNITS
mA
V
V
V
2.25
I
OL
= +4mA Std. drive
I
OH
= -4mA Std. drive
V
OL
= 0.4V, V
OH
= 2.4V
±50
V
DD
– 0.4
3.63
0.4
24
mA
mA
JITTER AND PHASE NOISE SPECIFICATION
PARAMETERS
Period Jitter
(PkPk – 10,000 samples)
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
CONDITIONS
at 155MHz, with capacitive decoupling
between VDD and GND.
at 80MHz, with capacitive decoupling
between VDD and GND.
125MHz @100Hz offset
125MHz @1kHz offset
125MHz @10kHz offset
125MHz @100kHz offset
125MHz @1MHz offset
MIN.
TYP.
50
ps
55
-100
-118
-112
-98
-107
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
MAX.
UNITS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 02/18/05 Page 4
PLL602-20
200MHz XO IC With Selectable 4X/8X Multiplier
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
Maximum Sustainable Drive Level
Operating Drive Level
Crystal Shunt Capacitance
Effective Series Resistance, Fundamental, 10-30MHz
Note:
A detailed crystal specification document is also available for this part
SYMBOL
F
XIN
C
L (xtal)
MIN.
10
TYP.
MAX.
30
UNITS
MHz
pF
11
500
100
µW
µW
C0
R
E
6
30
pF
Ω
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
SOIC 8L
Symbol
A
A1
A2
B
C
D
E
H
L
e
Dimension in MM
Min.
Max.
1.35
1.75
0.10
0.25
1.25
1.50
0.33
0.53
0.19
0.27
4.80
5.00
3.80
4.00
5.80
6.20
0.40
0.89
1.27 BSC
E
H
D
A2 A
A1
e
b
C
L
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 02/18/05 Page 5
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
