Preliminary
PLL502-27
Low Phase Noise VCXO (24MHz to 50MHz)
FEATURES
•
•
•
•
•
•
•
•
•
•
Low phase noise VCXO output for the 24MHz to
50MHz range (-130 dBc at 10kHz offset).
CMOS output.
12 to 25MHz crystal input.
Integrated variable capacitors.
Selectable High Drive (36mA drive capability at
TTL level) or Standard Drive (12mA drive capa-
bility at TTL) output.
Wide pull range (+/- 250 ppm).
Low jitter (RMS): 10ps period (1 sigma).
3.3V operation.
Available in 8-Pin TSSOP or SOIC.
Pin-to-Pin compatible with ICS MK3727
PIN CONFIGURATION
XIN
VDD
VIN
GND
1
2
3
4
8
7
6
5
XOUT
GND (or NC)
NC
CLK
OUTPUT RANGE
MULTIPLIER
FREQUENCY
RANGE
OUTPUT
BUFFER
PLL502-27
DESCRIPTIONS
The PLL502-27 is a low cost, high performance and
low phase noise VCXO, providing less than -130dBc
at 10kHz offset in the 24MHz to 50MHz operating
range. The very low jitter (10 ps RMS period jitter)
makes this chip ideal for applications requiring volt-
age controlled frequency sources. Input crystal can
range from 12 to 25MHz (fundamental resonant
mode).
x2
24 - 50MHz
CMOS
BLOCK DIAGRAM
VCO
Divider
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
CLK
XIN
XOUT
OE
XTAL
OSC
VARICAP
VIN
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 2/25/03 Page 1
Preliminary
PLL502-27
Low Phase Noise VCXO (24MHz to 50MHz)
PIN DESCRIPTIONS
Name
XIN
VDD
VIN
GND
CLK
N/C
XOUT
Number
1
2
3
4, 7
5
6
8
Type
I
P
I
P
O
-
I
Crystal input pin.
+3.3V VDD power supply pin.
Description
Frequency control voltage input pin.
Ground pin (pin 7 is optional).
Output clock pin.
Not connected.
Crystal output pin.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Soldering Temperature
Storage Temperature
Ambient Operating Temperature*
T
S
-65
-40
SYMBOL
V
CC
V
I
V
O
MIN.
MAX.
7
V
CC
+
0.5
V
CC
+
0.5
260
150
85
UNITS
V
V
V
°C
°C
°C
-
0.5
-
0.5
-
0.5
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 2/25/03 Page 2
Preliminary
PLL502-27
Low Phase Noise VCXO (24MHz to 50MHz)
2. AC Electrical Specifications
PARAMETERS
Input Crystal Frequency
Output Clock Rise/Fall Time
(Low Drive)
Output Clock Rise/Fall Time
(High Drive)
Output Clock Duty Cycle
Short Circuit Current
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
Measured @ 1.4V
45
SYMBOL
CONDITIONS
MIN.
12
TYP.
1.15
3.7
0.5
1.5
50
±50
MAX.
25
UNITS
MHz
ns
55
%
mA
3. Voltage Control Crystal Oscillator
PARAMETERS
VCXO Stabilization Time *
VCXO Tuning Range
CLK output pullability
VCXO Tuning Characteristic
Pull range linearity
VCON pin input impedance
VCON modulation BW
0V
≤
VIN
≤
3.3V, -3dB
2000
25
SYMBOL
T
VCXOSTB
CONDITIONS
From power valid
F
XIN
= 12 – 25MHz;
XTAL C
0
/C
1
< 250
0V
≤
VIN
≤
3.3V
MIN.
TYP.
10
MAX.
UNITS
ms
ppm
ppm
500
±250
165
10
ppm/V
%
kΩ
kHz
Note:
Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
4. Jitter and Phase Noise specification
PARAMETERS
RMS Period Jitter
(1 sigma – 1000 samples)
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
CONDITIONS
at 44MHz, with capacitive
decoupling between VDD
and GND.
44MHz @100Hz offset
44MHz @1kHz offset
44MHz @10kHz offset
44MHz @100kHz offset
44MHz @1MHz offset
MIN.
TYP.
MAX.
10
UNITS
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
-80
-110
-130
-123
-124
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 2/25/03 Page 3
Preliminary
PLL502-27
Low Phase Noise VCXO (24MHz to 50MHz)
5. DC Specification
PARAMETERS
Supply Current, Dynamic,
with Loaded Outputs
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage at
CMOS level
Output drive current
Short Circuit Current
VCXO Control Voltage
ESD Protection
VCON
0
SYMBOL
I
DD
V
DD
V
OH
V
OL
V
OHC
CONDITIONS
F
XIN
= 12 - 25MHz
Ouput load of 10pF
MIN.
TYP.
16
MAX.
20
3.47
0.4
UNITS
mA
V
V
V
V
3.13
I
OH
= -12mA (low drive)
I
LO
= 12mA (low drive)
I
OH
= -4mA (low drive)
At TTL level (High drive)
At TTL level (Low drive)
V
DD
– 0.4
36
12
51
17
±50
2.4
mA
mA
mA
3.3
V
Human Body Model
3000
6. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Capacitance Rating
C0/C1
ESR
R
S
SYMBOL
F
XIN
C
L
(xtal)
MIN.
12
TYP.
MAX.
25
UNITS
MHz
pF
9.5
250
30
-
Ω
Note:
Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at
nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally.
This however may reduce the pull range.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 2/25/03 Page 4
Preliminary
PLL502-27
Low Phase Noise VCXO (24MHz to 50MHz)
PACKAGE INFORMATION
8 PIN ( dimensions in mm )
Narrow SOIC
Symbol
A
A1
B
C
D
E
H
L
e
Min.
1.47
0.10
0.33
0.19
4.80
3.80
5.80
0.38
Max.
1.73
0.25
0.51
0.25
4.95
4.00
6.20
1.27
1.27 BSC
Min.
-
0.05
0.19
0.09
2.90
4.30
6.20
0.45
TSSOP
Max.
1.20
0.15
0.30
0.20
3.10
4.50
6.60
0.75
0.65 BSC
A1
B
e
C
L
A
D
E
H
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PART NUMBER
PLL502-27 X C
PART NUMBER
TEMPERATURATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
S=SOIC, O=TSSOP
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 2/25/03 Page 5
NXP MCU
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