NVMFS6H818N
Power MOSFET
80 V, 3.7 mW, 123 A, Single N−Channel
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFS6H818NWF − Wettable Flank Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJC
(Notes 1, 3)
Power Dissipation
R
qJC
(Note 1)
Continuous Drain
Current R
qJA
(Notes 1, 2, 3)
Power Dissipation
R
qJA
(Notes 1 & 2)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
T
L
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
80
±20
123
87
136
68
20
14
3.8
1.9
900
−55 to
+ 175
113
731
260
A
°C
A
mJ
°C
W
A
W
Unit
V
V
A
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V
(BR)DSS
80 V
R
DS(ON)
MAX
3.7 mW @ 10 V
I
D
MAX
123 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
D
1
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (I
L(pk)
= 9.3 A)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
XXXXXX
AYWZZ
D
D
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
XXXXXX = 6H818N
XXXXXX =
(NVMFS6H818N) or
XXXXXX =
818NWF
XXXXXX =
(NVMFS6H818NWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
1.1
39
Unit
°C/W
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2017
1
August, 2017 − Rev. 1
Publication Order Number:
NVMFS6H818N/D
NVMFS6H818N
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
V
GS
= 0 V,
V
DS
= 80 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
80
39
10
100
100
V
mV/°C
mA
nA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
I
GSS
V
DS
= 0 V, V
GS
= 20 V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
V
GS
= V
DS
, I
D
= 190
mA
2.0
7.0
4.0
V
mV/°C
V
GS
= 10 V
I
D
= 20 A
3.1
170
3.7
mW
S
V
DS
=15 V, I
D
= 50 A
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
SWITCHING CHARACTERISTICS
(Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 20 A
T
J
= 25°C
T
J
= 125°C
0.8
0.7
63
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
S
= 50 A
31
32
55
nC
ns
1.2
V
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 10 V, V
DS
= 64 V,
I
D
= 50 A, R
G
= 2.5
W
22
98
49
21
ns
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GP
V
GS
= 10 V, V
DS
= 40 V; I
D
= 50 A
V
GS
= 10 V, V
DS
= 40 V; I
D
= 50 A
V
GS
= 0 V, f = 1 MHz, V
DS
= 40 V
3100
440
20
46
9.0
15
8.0
5.0
V
nC
pF
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
t
RR
t
a
t
b
Q
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6H818N
TYPICAL CHARACTERISTICS
250
5.5 to 10 V
I
D
, DRAIN CURRENT (A)
200
5.0 V
I
D
, DRAIN CURRENT (A)
200
250
V
DS
= 10 V
150
150
100
4.5 V
100
T
J
= 25°C
T
J
= 125°C
2
3
4
T
J
= −55°C
5
6
7
50
V
GS
= 4.0 V
0
0
1
2
3
4
5
6
7
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
50
0
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
Figure 1. On−Region Characteristics
16
14
12
10
8
6
4
2
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 20 A
T
J
= 25°C
Figure 2. Transfer Characteristics
5.0
T
J
= 25°C
4.5
4.0
3.5
V
GS
= 10 V
3.0
2.5
2.0
5
10
15
20
25
30
35
40
45
50
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
−50 −25
I
D
= 20 A
V
GS
= 10 V
1M
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 175°C
100K
I
DSS
, LEAKAGE (nA)
10K
1K
100
10
1
T
J
= 25°C
T
J
= 150°C
T
J
= 125°C
T
J
= 85°C
0
25
50
75
100
125
150
175
5
15
25
35
45
55
65
75
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6H818N
TYPICAL CHARACTERISTICS
10K
C
iss
1K
C
oss
100
T
J
= 25°C
V
GS
= 0 V
f = 1 MHz
10
0
10
20
30
40
50
60
70
80
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
10
9
8
7
6
5
4
3
2
1
0
0
5
10
15
20
25
30
35
40
45
50
Q
g
, TOTAL GATE CHARGE (nC)
V
DS
= 40 V
I
D
= 50 A
T
J
= 25°C
Q
gs
Q
gd
C
rss
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
V
GS
= 10 V
V
DS
= 64 V
I
D
= 50 A
t, TIME (ns)
100
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
Figure 8. Gate−to−Source vs. Total Charge
V
GS
= 0 V
100
t
r
t
d(off)
t
d(on)
10
10
1
t
f
10
R
G
, GATE RESISTANCE (W)
100
1
0.3
T
J
= 125°C
0.4
0.5
T
J
= 25°C
0.6
0.7
T
J
= −55°C
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
100
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT (A)
100
I
PEAK
(A)
T
J(initial)
= 25°C
10
T
J(initial)
= 100°C
10
T
C
= 25°C
V
GS
≤
10 V
Single Pulse
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
10
ms
0.5 ms
1 ms
10 ms
1
0.1
1
100
1000
0.0001
0.001
TIME IN AVALANCHE (s)
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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NVMFS6H818N
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
10 20%
10%
5%
1 2%
1%
0.1
R
qJA
(t) (°C/W)
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (sec)
0.1
1
10
100
1000
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
NVMFS6H818NT1G
NVMFS6H818NWFT1G
Marking
6H818N
818NWF
Package
DFN5
(Pb−Free)
DFN5
(Pb−Free, Wettable Flanks)
Shipping
†
1500 / Tape & Reel
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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