2 outputs fixed at 50MHz, 2 outputs fixed at 25MHz .
Zero PPM synthesis error in all clocks.
Ideal for Network switches.
3.3V operation.
Available in 14-Pin 150mil SOIC
.
PLL 650-07
3
4
5
6
7
12
11
10
9
8
DESCRIPTION
The PLL650-07 is a low cost, low jitter, high
performance clock synthesizer. With PhaseLink’s
proprietary analog Phase Locked Loop techniques, this
device can produce multiple clock outputs from a 25.0MHz
crystal or reference clock. This makes the PLL650-07 an
excellent choice for systems requiring clocking for network
chips and ASICs.
BLOCK DIAGRAM
XIN
XOUT
XTAL
OSC
Phase
Detector
Charge
Pump
+
Loop
Filter
VCO
Post
Divider
2
50MHz
VCO
Divider
2
25MHz
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1
PLL650-07
LOW COST Network LAN Clock SOURCE
PIN DESCRIPTIONS
Name
XOUT
XIN
50MHz
25MHz
NC
VDD
GND
VDDA
GNDA
Number
1
14
4,6
8,10
12
3,7
5,9,11
13
2
Type
O
I
O
O
-
P
P
P
P
Description
Crystal output.
25MHz fundamental crystal input (20pF C
L
parallel resonant) or clock input.
50MHz outputs.
25MHz outputs.
No connection.
Power supply.
Ground.
Analog power supply
Analog ground.
Electrical Specifications
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specifications
PARAMETERS
Input Frequency
Output Rise Time
Output Fall Time
Duty Cycle
Max. Absolute Jitter
Max. Jitter, cycle to cycle
CONDITIONS
0.8V to 2.0V with no load
2.0V to 0.8V with no load
@ 50% V
DD
Short term
MIN.
10
TYP.
25
MAX.
27
1.5
1.5
55
80
UNITS
MHz
ns
ns
%
ps
ps
45
50
±150
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 2
PLL650-07
LOW COST Network LAN Clock SOURCE
3. DC Specifications
PARAMETERS
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage At
CMOS Level
Operating Supply Current
Short-circuit Current
Nominal output current
Nominal output current
SYMBOL
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
I
DD
I
S
I
out
I
out
CONDITIONS
MIN.
2.97
TYP.
V
DD
/2
V
DD
/2
MAX.
3.63
V
DD
/2 - 1
0.8
UNITS
V
V
V
V
V
V
V
V
For all normal input
For all normal input
I
OH
= -25mA
I
OL
= 25mA
I
OH
= -8mA
No Load
CMOS output level
TTL output level
2
2.4
0.4
V
DD
-0.4
35
35
20
±50
40
25
mA
mA
mA
mA
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 3
PLL650-07
LOW COST Network LAN Clock SOURCE
PACKAGE INFORMATION
14 PIN Narrow SOIC ( mm )
SOIC
Symbol
A
A1
B
C
D
E
H
L
e
Min.
1.35
0.10
0.33
0.19
9.80
3.80
5.80
0.40
1.27 BSC
Max.
1.75
0.25
0.51
0.25
10.00
4.00
6.20
1.27
A1
B
A
C
L
e
D
E
H
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL650-07 S C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRIAL
PACKAGE TYPE
S=SOIC
Order Number
PLL650-07SC-R
PLL650-07SC
Marking
P650-07SC
P650-07SC
Package Option
SOIC - Tape and Reel
SOIC - Tube
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
便携式数字数据采集系统（PDDAS）使用了LabVIEW实时模块和PXI，以控制风洞测试和采集记录来自128个不同通道的空气压力数据 "通过LabVIEW实时模块，可以在各种操作情况下获得采集空气压力数据及向风洞提供反馈控制信号所需的确定性响应时间。" – Dave Scheibenhoffer, G Systems 挑战: 用一个可采集、分析和存储来自下一代喷气式战斗机引擎设计的动...[详细]
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